ppc4xx: Sequoia coding style cleanup and beautification

[u-boot] / board / csb272 / csb272.c

diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c
index fecd7e8ef387620dd09db9c5b570d44e74bf11a4..24c6f0d9869f6940f563398f361ab1aae9a85c0e 100644 (file)
--- a/board/csb272/csb272.c
+++ b/board/csb272/csb272.c
@@ -25,7 +25,7 @@
 #include <asm/processor.h>
 #include <i2c.h>
 #include <miiphy.h>
-#include <405gp_enet.h>
+#include <ppc4xx_enet.h>
 
 /*
  * Configuration data for AMIS FS6377-01 Programmable 3-PLL Clock Generator
@@ -164,10 +164,15 @@ long initdram (int board_type)
 int last_stage_init(void)
 {
        /* initialize the PHY */
-       miiphy_reset(CONFIG_PHY_ADDR);
-       miiphy_write(CONFIG_PHY_ADDR, PHY_BMCR,
-                       PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);     /* AUTO neg */
-       miiphy_write(CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08);       /* LEDs     */
+       miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR);
+
+       /* AUTO neg */
+       miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR,
+                       PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+
+       /* LEDs     */
+       miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08);
+
 
        return 0; /* success */
 }