VCMA9: remove EXT2 support

[u-boot] / board / davinci / sffsdr / sffsdr.c

diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c
index 9296d7b634bb57fe58aa65765b88f72c969c56cc..f6ab91e6ff5576ebbc8e2ba8bae17595f8ac742a 100644 (file)
--- a/board/davinci/sffsdr/sffsdr.c
+++ b/board/davinci/sffsdr/sffsdr.c
@@ -9,30 +9,13 @@
  *
  * Copyright (C) 2004 Texas Instruments.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <i2c.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
-#include "../common/psc.h"
-#include "../common/misc.h"
+#include <asm/arch/davinci_misc.h>
 
 #define DAVINCI_A3CR     (0x01E00014)  /* EMIF-A CS3 config register. */
 #define DAVINCI_A3CR_VAL (0x3FFFFFFD)  /* EMIF-A CS3 value for FPGA. */
@@ -51,16 +34,9 @@ int board_init(void)
        /* address of boot parameters */
        gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
 
-       /* Workaround for TMS320DM6446 errata 1.3.22 */
-       REG(PSC_SILVER_BULLET) = 0;
+       davinci_errata_workarounds();
 
        /* Power on required peripherals */
-       lpsc_on(DAVINCI_LPSC_EMAC);
-       lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
-       lpsc_on(DAVINCI_LPSC_MDIO);
-       lpsc_on(DAVINCI_LPSC_I2C);
-       lpsc_on(DAVINCI_LPSC_UART0);
-       lpsc_on(DAVINCI_LPSC_TIMER1);
        lpsc_on(DAVINCI_LPSC_GPIO);
 
 #if !defined(CONFIG_SYS_USE_DSPLINK)
@@ -68,24 +44,11 @@ int board_init(void)
        dsp_on();
 #endif /* CONFIG_SYS_USE_DSPLINK */
 
-       /* Bringup UART0 out of reset */
-       REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
-       /* Enable GIO3.3V cells used for EMAC */
-       REG(VDD3P3V_PWDN) = 0;
-
-       /* Enable UART0 MUX lines */
-       REG(PINMUX1) |= 1;
-
-       /* Enable EMAC and AEMIF pins */
-       REG(PINMUX0) = 0x80000c1f;
-
-       /* Enable I2C pin Mux */
-       REG(PINMUX1) |= (1 << 7);
-
-       /* Set the Bus Priority Register to appropriate value */
-       REG(VBPR) = 0x20;
+       davinci_enable_uart0();
+       davinci_enable_emac();
+       davinci_enable_i2c();
 
+       lpsc_on(DAVINCI_LPSC_TIMER1);
        timer_init();
 
        return(0);
@@ -153,8 +116,6 @@ int misc_init_r(void)
        /* EMIF-A CS3 configuration for FPGA. */
        REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL;
 
-       dv_display_clk_infos();
-
        /* Configure I2C switch (PCA9543) to enable channel 0. */
        i2cbuf = CONFIG_SYS_I2C_PCA9543_ENABLE_CH0;
        if (i2c_write(CONFIG_SYS_I2C_PCA9543_ADDR, 0,
@@ -165,10 +126,7 @@ int misc_init_r(void)
 
        /* Read Ethernet MAC address from EEPROM if available. */
        if (sffsdr_read_mac_address(eeprom_enetaddr))
-               dv_configure_mac_address(eeprom_enetaddr);
-
-       if (!eth_hw_init())
-               printf("Ethernet init failed\n");
+               davinci_sync_env_enetaddr(eeprom_enetaddr);
 
        return(0);
 }