]> git.sur5r.net Git - u-boot/blobdiff - board/eNET/eNET.c
eNET: Add PC/AT compatibility setup function
[u-boot] / board / eNET / eNET.c
index 62f99ce94dbcd5be00e33846e4027300d6dfbafe..ad71f7e5dcb43b46856c8df0266bd56bf682b181 100644 (file)
@@ -180,3 +180,41 @@ int board_eth_init(bd_t *bis)
 {
        return pci_eth_init(bis);
 }
+
+void setup_pcat_compatibility()
+{
+       /* disable global interrupt mode */
+       writeb(0x40, &sc520_mmcr->picicr);
+
+       /* set all irqs to edge */
+       writeb(0x00, &sc520_mmcr->pic_mode[0]);
+       writeb(0x00, &sc520_mmcr->pic_mode[1]);
+       writeb(0x00, &sc520_mmcr->pic_mode[2]);
+
+       /*
+        *  active low polarity on PIC interrupt pins,
+        *  active high polarity on all other irq pins
+        */
+       writew(0x0000,&sc520_mmcr->intpinpol);
+
+       /* Set PIT 0 -> IRQ0, RTC -> IRQ8, FP error -> IRQ13 */
+       writeb(SC520_IRQ0, &sc520_mmcr->pit_int_map[0]);
+       writeb(SC520_IRQ8, &sc520_mmcr->rtcmap);
+       writeb(SC520_IRQ13, &sc520_mmcr->ferrmap);
+
+       /* Disable all other interrupt sources */
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[0]);
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[1]);
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[2]);
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[1]);
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[2]);
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[0]);        /* disable PCI INT A */
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[1]);        /* disable PCI INT B */
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[2]);        /* disable PCI INT C */
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[3]);        /* disable PCI INT D */
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->dmabcintmap);           /* disable DMA INT */
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->ssimap);
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wdtmap);
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wpvmap);
+       writeb(SC520_IRQ_DISABLED, &sc520_mmcr->icemap);
+}