Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx

[u-boot] / board / eric / eric.c

diff --git a/board/eric/eric.c b/board/eric/eric.c
index 17fe6acea6d540949f2b69274ef1b43199bb1529..cfcfa525a9d86698f1fee45a75063033d67facb9 100644 (file)
--- a/board/eric/eric.c
+++ b/board/eric/eric.c
@@ -26,12 +26,14 @@
 #include "eric.h"
 #include <asm/processor.h>
 
-#define IBM405GP_GPIO0_OR      0xef600700      /* GPIO Output */
-#define IBM405GP_GPIO0_TCR     0xef600704      /* GPIO Three-State Control */
-#define IBM405GP_GPIO0_ODR     0xef600718      /* GPIO Open Drain */
-#define IBM405GP_GPIO0_IR      0xef60071c      /* GPIO Input */
+#define PPC405GP_GPIO0_OR      0xef600700      /* GPIO Output */
+#define PPC405GP_GPIO0_TCR     0xef600704      /* GPIO Three-State Control */
+#define PPC405GP_GPIO0_ODR     0xef600718      /* GPIO Open Drain */
+#define PPC405GP_GPIO0_IR      0xef60071c      /* GPIO Input */
 
-int board_pre_init (void)
+void sdram_init(void);
+
+int board_early_init_f (void)
 {
 
    /*-------------------------------------------------------------------------+
@@ -50,7 +52,7 @@ int board_pre_init (void)
    |       IRQ 30 (EXT IRQ 5) PCI INTB#; active low; level sensitive
    |       IRQ 31 (EXT IRQ 6) PCI INTA#; active low; level sensitive
    |        -> IRQ6 Pin is NOW GPIO23 and can be activateted by setting
-   |           IBM405GP_GPIO0_TCR Bit 0 = 1 (driving the output as defined in IBM405GP_GPIO0_OR,
+   |           PPC405GP_GPIO0_TCR Bit 0 = 1 (driving the output as defined in PPC405GP_GPIO0_OR,
    |           else tristate)
    | Note for ERIC board:
    |       An interrupt taken for the HOST (IRQ 28) indicates that
@@ -60,18 +62,18 @@ int board_pre_init (void)
    |
    +-------------------------------------------------------------------------*/
 
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
-       mtdcr (uicer, 0x00000000);      /* disable all ints */
-       mtdcr (uiccr, 0x00000000);      /* set all SMI to be non-critical */
-       mtdcr (uicpr, 0xFFFFFF88);      /* set int polarities; IRQ3 to 1 */
-       mtdcr (uictr, 0x10000000);      /* set int trigger levels, UART0 is EDGE */
-       mtdcr (uicvcr, 0x00000001);     /* set vect base=0,INT0 highest priority */
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
+       mtdcr (UIC0ER, 0x00000000);     /* disable all ints */
+       mtdcr (UIC0CR, 0x00000000);     /* set all SMI to be non-critical */
+       mtdcr (UIC0PR, 0xFFFFFF88);     /* set int polarities; IRQ3 to 1 */
+       mtdcr (UIC0TR, 0x10000000);     /* set int trigger levels, UART0 is EDGE */
+       mtdcr (UIC0VCR, 0x00000001);    /* set vect base=0,INT0 highest priority */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
 
-       mtdcr (cntrl0, 0x00002000);     /* set IRQ6 as GPIO23 to generate an interrupt request to the PCP2PCI bridge */
+       mtdcr (CPC0_CR0, 0x00002000);   /* set IRQ6 as GPIO23 to generate an interrupt request to the PCP2PCI bridge */
 
-       out32 (IBM405GP_GPIO0_OR, 0x60000000);  /*fixme is SMB_INT high or low active??; IRQ6 is GPIO23 output */
-       out32 (IBM405GP_GPIO0_TCR, 0x7E400000);
+       out32 (PPC405GP_GPIO0_OR, 0x60000000);  /*fixme is SMB_INT high or low active??; IRQ6 is GPIO23 output */
+       out32 (PPC405GP_GPIO0_TCR, 0x7E400000);
 
        return 0;
 }
@@ -85,8 +87,8 @@ int board_pre_init (void)
 
 int checkboard (void)
 {
-       unsigned char *s = getenv ("serial#");
-       unsigned char *e;
+       char *s = getenv ("serial#");
+       char *e;
 
        puts ("Board: ");
 
@@ -119,7 +121,7 @@ int checkboard (void)
 */
 /* ------------------------------------------------------------------------- */
 /* ------------------------------------------------------------------------- */
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
 #ifndef CONFIG_ERIC
        int i;
@@ -127,6 +129,12 @@ long int initdram (int board_type)
        int TotalSize;
 #endif
 
+       /*
+        * ToDo: Move the asm init routine sdram_init() to this C file,
+        * or even better use some common ppc4xx code available
+        * in cpu/ppc4xx
+        */
+       sdram_init();
 
 #ifdef CONFIG_ERIC
        /*
@@ -134,7 +142,7 @@ long int initdram (int board_type)
         * so let init.S do the init job for SDRAM
         * and simply return 32MByte here
         */
-       return (CFG_SDRAM_SIZE * 1024 * 1024);
+       return (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024);
 #else
 
        /* Read Serial Presence Detect Information */