twl4030: make twl4030_i2c_write_u8 prototype consistent

[u-boot] / board / esd / dp405 / dp405.c

diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c
index 6d99b60130ebd9a08e0183707df5f464f44ad7cb..587809226fbcd6873588b577920b0b7668e46daa 100644 (file)
--- a/board/esd/dp405/dp405.c
+++ b/board/esd/dp405/dp405.c
@@ -23,19 +23,13 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <command.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
-/* fpga configuration data - not compressed, generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-int filesize = sizeof(fpgadata);
-
-
-int board_pre_init (void)
+int board_early_init_f (void)
 {
        /*
         * IRQ 0-15  405GP internally generated; active high; level sensitive
@@ -49,41 +43,38 @@ int board_pre_init (void)
         * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
         * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
         */
-       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
-       mtdcr(uicer, 0x00000000);       /* disable all ints */
-       mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
-       mtdcr(uicpr, 0xFFFFFF80);       /* set int polarities */
-       mtdcr(uictr, 0x10000000);       /* set int trigger levels */
-       mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
-       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+       mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
+       mtdcr(UIC0ER, 0x00000000);       /* disable all ints */
+       mtdcr(UIC0CR, 0x00000000);       /* set all to be non-critical*/
+       mtdcr(UIC0PR, 0xFFFFFF80);       /* set int polarities */
+       mtdcr(UIC0TR, 0x10000000);       /* set int trigger levels */
+       mtdcr(UIC0VCR, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+       mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
 
        /*
         * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
         */
-       mtebc (epcr, 0xa8400000); /* ebc always driven */
-
-       return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
-       return 0;  /* dummy implementation */
-}
-
+       mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
 
-int misc_init_r (void)
-{
        /*
         * Reset CPLD via GPIO13 (CS4) pin
         */
-       out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 13));
+       out_be32((void *)GPIO0_OR,
+                in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 13));
        udelay(1000); /* wait 1ms */
-       out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 13));
+       out_be32((void *)GPIO0_OR,
+                in_be32((void *)GPIO0_OR) | (0x80000000 >> 13));
        udelay(1000); /* wait 1ms */
 
+       return 0;
+}
+
+int misc_init_r (void)
+{
+       /* adjust flash start and offset */
+       gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
+       gd->bd->bi_flashoffset = 0;
+
        return (0);
 }
 
@@ -94,50 +85,44 @@ int misc_init_r (void)
 
 int checkboard (void)
 {
-       unsigned char str[64];
-       int i = getenv_r ("serial#", str, sizeof(str));
+       char str[64];
+       int i = getenv_f("serial#", str, sizeof(str));
        unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe,
                                   0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf};
-       unsigned char id1, id2;
+       unsigned char id1, id2, rev;
 
        puts ("Board: ");
 
-       if (i == -1) {
+       if (i == -1)
                puts ("### No HW ID - assuming DP405");
-       } else {
+       else
                puts(str);
+
+       id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f];
+       id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f];
+
+       rev = in_8((void *)0xf0001000);
+       if (rev & 0x10) /* old DP405 compatibility */
+               rev = in_8((void *)0xf0000800);
+
+       switch (rev & 0xc0) {
+       case 0x00:
+               puts(" (HW=DP405");
+               break;
+       case 0x80:
+               puts(" (HW=DP405/CO");
+               break;
+       case 0xc0:
+               puts(" (HW=DN405");
+               break;
        }
+       printf(", ID=0x%1X%1X, PLD=0x%02X", id2, id1, rev & 0x0f);
 
-       id1 = trans[(~(in32(GPIO0_IR) >> 5)) & 0x0000000f];
-       id2 = trans[(~(in32(GPIO0_IR) >> 9)) & 0x0000000f];
-       printf(" (ID=0x%1X%1X)\n", id1, id2);
+       if ((rev & 0xc0) == 0xc0) {
+               printf(", C5V=%s",
+                      in_be32((void *)GPIO0_IR) & 0x40000000 ? "off" : "on");
+       }
+       puts(")\n");
 
        return 0;
 }
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
-       unsigned long val;
-
-       mtdcr(memcfga, mem_mb0cf);
-       val = mfdcr(memcfgd);
-
-#if 0
-       printf("\nmb0cf=%x\n", val); /* test-only */
-       printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
-       return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
-       /* TODO: XXX XXX XXX */
-       printf ("test: 16 MB - ok\n");
-
-       return (0);
-}