twl4030: make twl4030_i2c_read_u8 prototype consistent

[u-boot] / board / esd / du405 / du405.c

diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c
index 7b430ea254d45ec8ad2d9bfba867570fc4a0aff7..c32d333ddfab897d8053fa4d3ea08872631e71d9 100644 (file)
--- a/board/esd/du405/du405.c
+++ b/board/esd/du405/du405.c
@@ -24,15 +24,14 @@
 #include <common.h>
 #include "du405.h"
 #include <asm/processor.h>
-#include <ppc4xx.h>
-#include <405gp_i2c.h>
+#include <asm/ppc4xx.h>
+#include <asm/ppc4xx-i2c.h>
 #include <command.h>
 
-/*cmd_boot.c*/
+DECLARE_GLOBAL_DATA_PTR;
 
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern void lxt971_no_sleep(void);
 
-/* ------------------------------------------------------------------------- */
 
 #if 0
 #define FPGA_DEBUG
@@ -53,10 +52,8 @@ const unsigned char fpgadata[] = {
 #include "../common/fpga.c"
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        int index, len, i;
        int status;
 
@@ -124,35 +121,46 @@ int board_pre_init (void)
         * IRQ 30 (EXT IRQ 5) unused; active low; level sensitive
         * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
         */
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
-       mtdcr (uicer, 0x00000000);      /* disable all ints */
-       mtdcr (uiccr, 0x00000000);      /* set all to be non-critical */
-       mtdcr (uicpr, 0xFFFFFFB1);      /* set int polarities */
-       mtdcr (uictr, 0x10000000);      /* set int trigger levels */
-       mtdcr (uicvcr, 0x00000001);     /* set vect base=0,INT0 highest priority */
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
+       mtdcr (UIC0ER, 0x00000000);     /* disable all ints */
+       mtdcr (UIC0CR, 0x00000000);     /* set all to be non-critical */
+       mtdcr (UIC0PR, 0xFFFFFFB1);     /* set int polarities */
+       mtdcr (UIC0TR, 0x10000000);     /* set int trigger levels */
+       mtdcr (UIC0VCR, 0x00000001);    /* set vect base=0,INT0 highest priority */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
 
        /*
         * EBC Configuration Register: set ready timeout to 100 us
         */
-       mtebc (epcr, 0xb8400000);
+       mtebc (EBC0_CFG, 0xb8400000);
 
        return 0;
 }
 
 
-/* ------------------------------------------------------------------------- */
+int misc_init_r (void)
+{
+       unsigned long CPC0_CR0Reg;
+
+       /*
+        * Setup UART1 handshaking: use CTS instead of DSR
+        */
+       CPC0_CR0Reg = mfdcr(CPC0_CR0);
+       mtdcr(CPC0_CR0, CPC0_CR0Reg | 0x00001000);
+
+       return (0);
+}
+
 
 /*
  * Check Board Identity:
  */
-
 int checkboard (void)
 {
        int index;
        int len;
-       unsigned char str[64];
-       int i = getenv_r ("serial#", str, sizeof (str));
+       char str[64];
+       int i = getenv_f("serial#", str, sizeof (str));
 
        puts ("Board: ");
 
@@ -177,27 +185,19 @@ int checkboard (void)
        /*
         * Reset external DUART via FPGA
         */
-       *(volatile unsigned char *) FPGA_MODE_REG = 0xff;       /* reset high active */
-       *(volatile unsigned char *) FPGA_MODE_REG = 0x00;       /* low again */
+       out_8((void *)FPGA_MODE_REG, 0xff); /* reset high active */
+       out_8((void *)FPGA_MODE_REG, 0x00); /* low again */
 
        return 0;
 }
 
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
-       return (16 * 1024 * 1024);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
+void reset_phy(void)
 {
-       /* TODO: XXX XXX XXX */
-       printf ("test: 16 MB - ok\n");
+#if defined(CONFIG_LXT971_NO_SLEEP)
 
-       return (0);
+       /*
+        * Disable sleep mode in LXT971
+        */
+       lxt971_no_sleep();
+#endif
 }
-
-/* ------------------------------------------------------------------------- */