#include <mpc5xxx.h>
#include <pci.h>
#include <command.h>
+#include <netdev.h>
#include "mt46v16m16-75.h"
/*
* ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
+ * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
* is something else than 0x00000000.
*/
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
ulong dramsize = 0;
ulong test1, test2;
/* find RAM size using SDRAM CS0 only */
sdram_start(0);
- test1 = get_ram_size((long *) CFG_SDRAM_BASE, 0x80000000);
+ test1 = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, 0x80000000);
sdram_start(1);
- test2 = get_ram_size((long *) CFG_SDRAM_BASE, 0x80000000);
+ test2 = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, 0x80000000);
if (test1 > test2) {
sdram_start(0);
#if 0
/* find RAM size using SDRAM CS1 only */
sdram_start(0);
- get_ram_size((ulong *) (CFG_SDRAM_BASE + dramsize), 0x80000000);
+ get_ram_size((ulong *) (CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
sdram_start(1);
- get_ram_size((ulong *) (CFG_SDRAM_BASE + dramsize), 0x80000000);
+ get_ram_size((ulong *) (CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
sdram_start(0);
#endif
/* set SDRAM CS1 size according to the amount of RAM found */
/* adjust mapping */
*(vu_long *) MPC5XXX_BOOTCS_START =
*(vu_long *) MPC5XXX_CS0_START =
- START_REG(CFG_BOOTCS_START | size);
+ START_REG(CONFIG_SYS_BOOTCS_START | size);
*(vu_long *) MPC5XXX_BOOTCS_STOP =
*(vu_long *) MPC5XXX_CS0_STOP =
- STOP_REG(CFG_BOOTCS_START | size, size);
+ STOP_REG(CONFIG_SYS_BOOTCS_START | size, size);
}
}
*(vu_long *) MPC5XXX_SIMPLEIO_GPIO_DATA_OUTPUT |= GPIO_USB0;
__asm__ volatile ("sync");
}
- *(vu_char *) CFG_CS1_START = 0x02; /* Red Power LED on */
+ *(vu_char *) CONFIG_SYS_CS1_START = 0x02; /* Red Power LED on */
__asm__ volatile ("sync");
- *(vu_char *) (CFG_CS1_START + 1) = 0x02; /* Disable driver for KB11 */
+ *(vu_char *) (CONFIG_SYS_CS1_START + 1) = 0x02; /* Disable driver for KB11 */
__asm__ volatile ("sync");
}
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
+
void power_set_reset(int power)
{
debug("ide_set_reset(%d)\n", power);
}
}
-int do_poweroff(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_poweroff(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
power_set_reset(1);
return (0);
}
-U_BOOT_CMD(poweroff, 1, 1, do_poweroff, "poweroff- Switch off power\n", NULL);
+U_BOOT_CMD(poweroff, 1, 1, do_poweroff, "Switch off power", "");
int phypower(int flag)
{
return (status);
}
-int do_phypower(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_phypower(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int status;
}
U_BOOT_CMD(phypower, 2, 2, do_phypower,
- "phypower- Switch power of ethernet phy\n", NULL);
+ "Switch power of ethernet phy", "");
-int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned int addr;
unsigned int size;
}
U_BOOT_CMD(writepci, 3, 1, do_writepci,
- "writepci- Write some data to pcibus\n",
- "<addr> <size>\n" " - Write some data to pcibus.\n");
+ "Write some data to pcibus",
+ "<addr> <size>\n"
+ ""
+);