Merge branch 'next' of ../master

[u-boot] / board / esd / plu405 / plu405.c

diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c
index 61186a8d7c35288653d0e82e6db6ed2d3e98133c..fdacbf6f6b121be933bae800e2e1760be1be040a 100644 (file)
--- a/board/esd/plu405/plu405.c
+++ b/board/esd/plu405/plu405.c
@@ -104,6 +104,7 @@ int misc_init_r (void)
        unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
        unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
        unsigned char *dst;
+       unsigned char fctr;
        ulong len = sizeof(fpgadata);
        int status;
        int index;
@@ -203,6 +204,15 @@ int misc_init_r (void)
        out_8(duart0_mcr, 0x08);
        out_8(duart1_mcr, 0x08);
 
+       /*
+        * Enable auto RS485 mode in 2nd external uart
+        */
+       out_8((void *)DUART1_BA + 3, 0xbf); /* write LCR */
+       fctr = in_8((void *)DUART1_BA + 1); /* read FCTR */
+       fctr |= 0x08;                       /* enable RS485 mode */
+       out_8((void *)DUART1_BA + 1, fctr); /* write FCTR */
+       out_8((void *)DUART1_BA + 3, 0);    /* write LCR */
+
        return (0);
 }
 
@@ -227,18 +237,18 @@ int checkboard (void)
 }
 
 #ifdef CONFIG_IDE_RESET
+#define FPGA_CTRL (CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL)
 void ide_set_reset(int on)
 {
-       volatile unsigned short *fpga_mode =
-               (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL);
-
        /*
         * Assert or deassert CompactFlash Reset Pin
         */
        if (on) {               /* assert RESET */
-               *fpga_mode &= ~(CONFIG_SYS_FPGA_CTRL_CF_RESET);
+               out_be16((void *)FPGA_CTRL,
+                        in_be16((void *)FPGA_CTRL) & ~CONFIG_SYS_FPGA_CTRL_CF_RESET);
        } else {                /* release RESET */
-               *fpga_mode |= CONFIG_SYS_FPGA_CTRL_CF_RESET;
+               out_be16((void *)FPGA_CTRL,
+                        in_be16((void *)FPGA_CTRL) | CONFIG_SYS_FPGA_CTRL_CF_RESET);
        }
 }
 #endif /* CONFIG_IDE_RESET */
@@ -323,6 +333,7 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 }
 
 U_BOOT_CMD(eepwren,    2,      0,      do_eep_wren,
-          "eepwren - Enable / disable / query EEPROM write access\n",
-          NULL);
+       "Enable / disable / query EEPROM write access",
+       ""
+);
 #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */