/*
* (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * (C) Copyright 2005
+ * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
*
* See file CREDITS for list of people who contributed to this
* project.
#include <command.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void lxt971_no_sleep(void);
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
*/
mtebc (epcr, 0xa8400000);
+ /*
+ * Setup GPIO pins
+ */
+
+ mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_FPGA_INIT | \
+ CFG_FPGA_DONE | \
+ CFG_XEREADY | \
+ CFG_NONMONARCH | \
+ CFG_REV1_2) << 5));
+
+ if (!(in32(GPIO0_IR) & CFG_REV1_2)) {
+ /* rev 1.2 boards */
+ mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_INTA_FAKE | \
+ CFG_SELF_RST) << 5));
+ }
+
+ out32(GPIO0_OR, 0);
+ out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA | CFG_XEREADY); /* setup for output */
+
+ /* - check if rev1_2 is low, then:
+ * - set/reset CFG_INTA_FAKE/CFG_SELF_RST in TCR to assert INTA# or SELFRST#
+ */
+
return 0;
}
/* ------------------------------------------------------------------------- */
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
int misc_init_r (void)
{
+ /* adjust flash start and offset */
+ gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
+ gd->bd->bi_flashoffset = 0;
+
+ out32(GPIO0_OR, in32(GPIO0_OR) | CFG_XEREADY); /* deassert EREADY# */
return (0);
}
+ushort pmc405_pci_subsys_deviceid(void)
+{
+ ulong val;
+ val = in32(GPIO0_IR);
+ if (!(val & CFG_REV1_2)) { /* low=rev1.2 */
+ if (val & CFG_NONMONARCH) { /* monarch# signal */
+ return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH;
+ }
+ return CFG_PCI_SUBSYS_DEVICEID_MONARCH;
+ }
+ return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH;
+}
/*
* Check Board Identity:
*/
-
int checkboard (void)
{
- unsigned char str[64];
+ ulong val;
+
+ char str[64];
int i = getenv_r ("serial#", str, sizeof(str));
puts ("Board: ");
puts(str);
}
+ val = in32(GPIO0_IR);
+ if (!(val & CFG_REV1_2)) { /* low=rev1.2 */
+ puts(" rev1.2 (");
+ if (val & CFG_NONMONARCH) { /* monarch# signal */
+ puts("non-");
+ }
+ puts("monarch)");
+ } else {
+ puts(" <=rev1.1");
+ }
+
putc ('\n');
return 0;
/* ------------------------------------------------------------------------- */
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
{
unsigned long val;
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
-/* ------------------------------------------------------------------------- */
-int testdram (void)
+/* ------------------------------------------------------------------------- */
+void reset_phy(void)
{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
+#ifdef CONFIG_LXT971_NO_SLEEP
- return (0);
+ /*
+ * Disable sleep mode in LXT971
+ */
+ lxt971_no_sleep();
+#endif
}
-/* ------------------------------------------------------------------------- */
+
+int do_cantest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ ulong addr;
+ volatile uchar *ptr;
+ volatile uchar val;
+ int i;
+
+ addr = simple_strtol (argv[1], NULL, 16) + 0x16;
+
+ i = 0;
+ for (;;) {
+ ptr = (uchar *)addr;
+ for (i=0; i<8; i++) {
+ *ptr = i;
+ val = *ptr;
+
+ if (val != i) {
+ printf("ERROR: addr=%p write=0x%02X, read=0x%02X\n", ptr, i, val);
+ return 0;
+ }
+
+ /* Abort if ctrl-c was pressed */
+ if (ctrlc()) {
+ puts("\nAbort\n");
+ return 0;
+ }
+
+ ptr++;
+ }
+ }
+
+ return 0;
+}
+U_BOOT_CMD(
+ cantest, 3, 1, do_cantest,
+ "cantest - Test CAN controller",
+ NULL
+ );