]> git.sur5r.net Git - u-boot/blobdiff - board/esd/pmc405/pmc405.c
* Patch by Matthias Fuchs, 18 Apr 2005:
[u-boot] / board / esd / pmc405 / pmc405.c
index 5c2e98c57e281e6a34871287acb5b56b982f5c8f..a72547d5ceff4dcbe561a56563a1183190979a91 100644 (file)
 #include <command.h>
 #include <malloc.h>
 
-/* ------------------------------------------------------------------------- */
+
+extern void lxt971_no_sleep(void);
 
 
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, int *);
+/* fpga configuration data - not compressed, generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+int filesize = sizeof(fpgadata);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
        /*
         * IRQ 0-15  405GP internally generated; active high; level sensitive
@@ -60,6 +65,18 @@ int board_pre_init (void)
         */
        mtebc (epcr, 0xa8400000);
 
+       /*
+        * Setup GPIO pins (CS6+CS7 as GPIO)
+        */
+       mtdcr(cntrl0, mfdcr(cntrl0) | 0x00300000);
+
+       /*
+        * Configure GPIO pins
+        */
+       out32(GPIO0_ODR, 0x00000000);                                /* no open drain pins */
+       out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA); /* setup for output */
+       out32(GPIO0_OR, 0);                                            /* outputs -> low   */
+
        return 0;
 }
 
@@ -74,103 +91,11 @@ int misc_init_f (void)
 
 int misc_init_r (void)
 {
-#if 0 /* test-only */
        DECLARE_GLOBAL_DATA_PTR;
-       volatile unsigned short *fpga_mode =
-               (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
-       volatile unsigned char *duart0_mcr =
-               (unsigned char *)((ulong)DUART0_BA + 4);
-       volatile unsigned char *duart1_mcr =
-               (unsigned char *)((ulong)DUART1_BA + 4);
-       bd_t *bd = gd->bd;
-       char *  tmp;                    /* Temporary char pointer      */
-       unsigned char *dst;
-       ulong len = sizeof(fpgadata);
-       int status;
-       int index;
-       int i;
-       unsigned long cntrl0Reg;
-
-       /*
-        * Setup GPIO pins (CS6+CS7 as GPIO)
-        */
-       cntrl0Reg = mfdcr(cntrl0);
-       mtdcr(cntrl0, cntrl0Reg | 0x00300000);
-
-       dst = malloc(CFG_FPGA_MAX_SIZE);
-       if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
-               printf ("GUNZIP ERROR - must RESET board to recover\n");
-               do_reset (NULL, 0, 0, NULL);
-       }
-
-       status = fpga_boot(dst, len);
-       if (status != 0) {
-               printf("\nFPGA: Booting failed ");
-               switch (status) {
-               case ERROR_FPGA_PRG_INIT_LOW:
-                       printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
-                       break;
-               case ERROR_FPGA_PRG_INIT_HIGH:
-                       printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
-                       break;
-               case ERROR_FPGA_PRG_DONE:
-                       printf("(Timeout: DONE not high after programming FPGA)\n ");
-                       break;
-               }
-
-               /* display infos on fpgaimage */
-               index = 15;
-               for (i=0; i<4; i++) {
-                       len = dst[index];
-                       printf("FPGA: %s\n", &(dst[index+1]));
-                       index += len+3;
-               }
-               putc ('\n');
-               /* delayed reboot */
-               for (i=20; i>0; i--) {
-                       printf("Rebooting in %2d seconds \r",i);
-                       for (index=0;index<1000;index++)
-                               udelay(1000);
-               }
-               putc ('\n');
-               do_reset(NULL, 0, 0, NULL);
-       }
-
-       /* restore gpio/cs settings */
-       mtdcr(cntrl0, cntrl0Reg);
-
-       puts("FPGA:  ");
-
-       /* display infos on fpgaimage */
-       index = 15;
-       for (i=0; i<4; i++) {
-               len = dst[index];
-               printf("%s ", &(dst[index+1]));
-               index += len+3;
-       }
-       putc ('\n');
-
-       free(dst);
-
-       /*
-        * Reset FPGA via FPGA_DATA pin
-        */
-       SET_FPGA(FPGA_PRG | FPGA_CLK);
-       udelay(1000); /* wait 1ms */
-       SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
-       udelay(1000); /* wait 1ms */
-
-       /*
-        * Enable power on PS/2 interface
-        */
-       *fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
 
-       /*
-        * Enable interrupts in exar duart mcr[3]
-        */
-       *duart0_mcr = 0x08;
-       *duart1_mcr = 0x08;
-#endif
+       /* adjust flash start and offset */
+       gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
+       gd->bd->bi_flashoffset = 0;
 
        return (0);
 }
@@ -188,13 +113,18 @@ int checkboard (void)
        puts ("Board: ");
 
        if (i == -1) {
-               puts ("### No HW ID - assuming ABG405");
+               puts ("### No HW ID - assuming PMC405");
        } else {
                puts(str);
        }
 
        putc ('\n');
 
+       /*
+        * Disable sleep mode in LXT971
+        */
+       lxt971_no_sleep();
+
        return 0;
 }
 
@@ -226,3 +156,42 @@ int testdram (void)
 }
 
 /* ------------------------------------------------------------------------- */
+
+int do_cantest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+       ulong addr;
+       volatile uchar *ptr;
+       volatile uchar val;
+       int i;
+
+       addr = simple_strtol (argv[1], NULL, 16) + 0x16;
+
+       i = 0;
+       for (;;) {
+               ptr = (uchar *)addr;
+               for (i=0; i<8; i++) {
+                       *ptr = i;
+                       val = *ptr;
+
+                       if (val != i) {
+                               printf("ERROR: addr=%p write=0x%02X, read=0x%02X\n", ptr, i, val);
+                               return 0;
+                       }
+
+                       /* Abort if ctrl-c was pressed */
+                       if (ctrlc()) {
+                               puts("\nAbort\n");
+                               return 0;
+                       }
+
+                       ptr++;
+               }
+       }
+
+       return 0;
+}
+U_BOOT_CMD(
+       cantest,        3,      1,      do_cantest,
+       "cantest - Test CAN controller",
+       NULL
+       );