serdes2_prtcl);
switch (serdes2_prtcl) {
+ case 0x17:
case 0x18:
/*
* Configuration:
fm_info_set_phy_address(FM1_DTSEC6, CONFIG_SYS_FM1_DTSEC6_PHY_ADDR);
switch (serdes1_prtcl) {
+ case 0x29:
case 0x2a:
/* Serdes 1: A-B SGMII, Configuring DTSEC 5 and 6 */
debug("Setting phy addresses for FM1_DTSEC5: %x and"
CONFIG_SYS_FM1_DTSEC6_PHY_ADDR);
break;
#ifdef CONFIG_PPC_B4420
+ case 0x17:
case 0x18:
/* Serdes 1: A-D SGMII, Configuring on board dual SGMII Phy */
debug("Setting phy addresses for FM1_DTSEC3: %x and"
break;
}
switch (serdes2_prtcl) {
+ case 0x17:
case 0x18:
debug("Setting phy addresses on SGMII Riser card for"
"FM1_DTSEC ports: \n");
fm_info_set_phy_address(FM1_DTSEC4,
CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR);
break;
+ case 0x48:
case 0x49:
debug("Setting phy addresses on SGMII Riser card for"
"FM1_DTSEC ports: \n");