]> git.sur5r.net Git - u-boot/blobdiff - board/freescale/ls1012afrdm/ls1012afrdm.c
LS1012AFRWY: Add Secure Boot support
[u-boot] / board / freescale / ls1012afrdm / ls1012afrdm.c
index f8908e057144e39cd1d9e29863a45ac363ca44f6..315da8b866d3703025108d58a1a36793344634b3 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP
  */
 
 #include <common.h>
 #endif
 #include <asm/arch/mmu.h>
 #include <asm/arch/soc.h>
+#include <fsl_esdhc.h>
 #include <hwconfig.h>
 #include <environment.h>
 #include <fsl_mmdc.h>
 #include <netdev.h>
+#include <fsl_sec.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static inline int get_board_version(void)
+{
+       struct ccsr_gpio *pgpio = (void *)(GPIO1_BASE_ADDR);
+       int val;
+
+       val = in_be32(&pgpio->gpdat);
+
+       return val;
+}
+
 int checkboard(void)
 {
+#ifdef CONFIG_TARGET_LS1012AFRDM
        puts("Board: LS1012AFRDM ");
+#else
+       int rev;
+
+       rev = get_board_version();
+
+       puts("Board: FRWY-LS1012A ");
+
+       puts("Version");
+
+       switch (rev) {
+       case BOARD_REV_A:
+               puts(": RevA ");
+               break;
+       case BOARD_REV_B:
+               puts(": RevB ");
+               break;
+       default:
+               puts(": unknown");
+               break;
+       }
+#endif
+
+       return 0;
+}
+
+#ifdef CONFIG_TARGET_LS1012AFRWY
+int esdhc_status_fixup(void *blob, const char *compat)
+{
+       char esdhc0_path[] = "/soc/esdhc@1560000";
+       char esdhc1_path[] = "/soc/esdhc@1580000";
+
+       do_fixup_by_path(blob, esdhc0_path, "status", "okay",
+                        sizeof("okay"), 1);
 
+       do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
+                        sizeof("disabled"), 1);
        return 0;
 }
+#endif
 
 int dram_init(void)
 {
-       static const struct fsl_mmdc_info mparam = {
+#ifdef CONFIG_TARGET_LS1012AFRWY
+       int board_rev;
+#endif
+       struct fsl_mmdc_info mparam = {
                0x04180000,     /* mdctl */
                0x00030035,     /* mdpdc */
                0x12554000,     /* mdotc */
@@ -45,9 +97,20 @@ int dram_init(void)
                0xa1390003,     /* mpzqhwctrl */
        };
 
-       mmdc_init(&mparam);
+#ifdef CONFIG_TARGET_LS1012AFRWY
+       board_rev = get_board_version();
 
+       if (board_rev & BOARD_REV_B) {
+               mparam.mdctl = 0x05180000;
+               gd->ram_size = SYS_SDRAM_SIZE_1024;
+       } else {
+               gd->ram_size = SYS_SDRAM_SIZE_512;
+       }
+#else
        gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+#endif
+       mmdc_init(&mparam);
+
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
        /* This will break-before-make MMU for DDR */
        update_early_mmu_table();
@@ -78,6 +141,10 @@ int board_init(void)
        gd->env_addr = (ulong)&default_environment[0];
 #endif
 
+#ifdef CONFIG_FSL_CAAM
+       sec_init();
+#endif
+
 #ifdef CONFIG_FSL_LS_PPA
        ppa_init();
 #endif