Merge git://git.denx.de/u-boot-fsl-qoriq

[u-boot] / board / freescale / ls1043aqds / ddr.c

diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c
index 7882a9a9a1d27761b456f08d85fe85b81c70d4f3..b22d3784dce60dd2af32898bc664eb3e98c6e00a 100644 (file)
--- a/board/freescale/ls1043aqds/ddr.c
+++ b/board/freescale/ls1043aqds/ddr.c
@@ -108,12 +108,14 @@ found:
 #endif
 }
 
-phys_size_t initdram(int board_type)
+int fsl_initdram(void)
 {
        phys_size_t dram_size;
 
 #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
-       return fsl_ddr_sdram_size();
+       gd->ram_size = fsl_ddr_sdram_size();
+
+       return 0;
 #else
        puts("Initializing DDR....using SPD\n");
 
@@ -125,34 +127,7 @@ phys_size_t initdram(int board_type)
        fsl_dp_ddr_restore();
 #endif
 
-       return dram_size;
-}
+       gd->ram_size = dram_size;
 
-void dram_init_banksize(void)
-{
-       /*
-        * gd->arch.secure_ram tracks the location of secure memory.
-        * It was set as if the memory starts from 0.
-        * The address needs to add the offset of its bank.
-        */
-       gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-       if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) {
-               gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE;
-               gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE;
-               gd->bd->bi_dram[1].size = gd->ram_size -
-                                         CONFIG_SYS_DDR_BLOCK1_SIZE;
-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-               gd->arch.secure_ram = gd->bd->bi_dram[1].start +
-                                     gd->arch.secure_ram -
-                                     CONFIG_SYS_DDR_BLOCK1_SIZE;
-               gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
-#endif
-       } else {
-               gd->bd->bi_dram[0].size = gd->ram_size;
-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-               gd->arch.secure_ram = gd->bd->bi_dram[0].start +
-                                     gd->arch.secure_ram;
-               gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
-#endif
-       }
+       return 0;
 }