]> git.sur5r.net Git - u-boot/blobdiff - board/freescale/ls1043aqds/ddr.c
imx: mx6sllevk: add plugin support
[u-boot] / board / freescale / ls1043aqds / ddr.c
index 3d3c53385a12c838b0229de1e03ca71e3e58a3c8..d4540d0a9a0e4b2be5bed3e97e70a170f4f22fc3 100644 (file)
@@ -116,6 +116,7 @@ phys_size_t initdram(int board_type)
 
        dram_size = fsl_ddr_sdram();
 #endif
+       erratum_a008850_post();
 
 #ifdef CONFIG_FSL_DEEP_SLEEP
        fsl_dp_ddr_restore();
@@ -127,7 +128,7 @@ phys_size_t initdram(int board_type)
 void dram_init_banksize(void)
 {
        /*
-        * gd->secure_ram tracks the location of secure memory.
+        * gd->arch.secure_ram tracks the location of secure memory.
         * It was set as if the memory starts from 0.
         * The address needs to add the offset of its bank.
         */
@@ -138,16 +139,17 @@ void dram_init_banksize(void)
                gd->bd->bi_dram[1].size = gd->ram_size -
                                          CONFIG_SYS_DDR_BLOCK1_SIZE;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-               gd->secure_ram = gd->bd->bi_dram[1].start +
-                                gd->secure_ram -
-                                CONFIG_SYS_DDR_BLOCK1_SIZE;
-               gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+               gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+                                     gd->arch.secure_ram -
+                                     CONFIG_SYS_DDR_BLOCK1_SIZE;
+               gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
        } else {
                gd->bd->bi_dram[0].size = gd->ram_size;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-               gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
-               gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+               gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+                                     gd->arch.secure_ram;
+               gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
        }
 }