#include <asm/io.h>
#include <fdt_support.h>
#include <libfdt.h>
-#include <fsl_debug_server.h>
#include <fsl-mc/fsl_mc.h>
#include <environment.h>
#include <i2c.h>
#define PIN_MUX_SEL_SDHC 0x00
#define PIN_MUX_SEL_DSPI 0x0a
+#define SCFG_QSPICLKCTRL_DIV_20 (5 << 27)
#define SET_SDHC_MUX_SEL(reg, value) ((reg & 0xf0) | value)
puts("PromJet\n");
else if (sw == 0x9)
puts("NAND\n");
+ else if (sw == 0xf)
+ puts("QSPI\n");
else if (sw == 0x15)
printf("IFCCard\n");
else
else
config_board_mux(MUX_TYPE_SDHC);
+#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
+ val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
+
+ if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))
+ QIXIS_WRITE(brdcfg[9],
+ (QIXIS_READ(brdcfg[9]) & 0xf8) |
+ FSL_QIXIS_BRDCFG9_QSPI);
+#endif
+
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)&default_environment[0];
#endif
int board_early_init_f(void)
{
+#ifdef CONFIG_SYS_I2C_EARLY_INIT
+ i2c_early_init_f();
+#endif
fsl_lsch3_early_init_f();
+#ifdef CONFIG_FSL_QSPI
+ /* input clk: 1/2 platform clk, output: input/20 */
+ out_le32(SCFG_BASE + SCFG_QSPICLKCTLR, SCFG_QSPICLKCTRL_DIV_20);
+#endif
return 0;
}
#if defined(CONFIG_ARCH_MISC_INIT)
int arch_misc_init(void)
{
-#ifdef CONFIG_FSL_DEBUG_SERVER
- debug_server_init();
-#endif
#ifdef CONFIG_FSL_CAAM
sec_init();
#endif
else
fdt_status_fail(fdt, offset);
}
+
+void board_quiesce_devices(void)
+{
+ fsl_mc_ldpaa_exit(gd->bd);
+}
#endif
#ifdef CONFIG_OF_BOARD_SETUP
int ft_board_setup(void *blob, bd_t *bd)
{
- int err;
u64 base[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
fdt_fixup_memory_banks(blob, base, size, 2);
+ fsl_fdt_fixup_dr_usb(blob, bd);
+
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
- err = fsl_mc_ldpaa_exit(bd);
- if (err)
- return err;
#endif
return 0;