]> git.sur5r.net Git - u-boot/blobdiff - board/freescale/ls2080ardb/ls2080ardb.c
Merge branch 'master' of git://git.denx.de/u-boot-mmc
[u-boot] / board / freescale / ls2080ardb / ls2080ardb.c
index 2ae9d6cf457b21167aa3f5c8a3dc0eb643cc58d7..ea05ec6f6518a79a62dca87142799097b77b6a64 100644 (file)
 #include <hwconfig.h>
 #include <fdt_support.h>
 #include <libfdt.h>
-#include <fsl_debug_server.h>
 #include <fsl-mc/fsl_mc.h>
 #include <environment.h>
+#include <efi_loader.h>
 #include <i2c.h>
+#include <asm/arch/mmu.h>
 #include <asm/arch/soc.h>
+#include <asm/arch/ppa.h>
+#include <fsl_sec.h>
 
 #include "../common/qixis.h"
 #include "ls2080ardb_qixis.h"
+#include "../common/vid.h"
 
 #define PIN_MUX_SEL_SDHC       0x00
 #define PIN_MUX_SEL_DSPI       0x0a
@@ -122,6 +126,11 @@ int select_i2c_ch_pca9547(u8 ch)
        return 0;
 }
 
+int i2c_multiplexer_select_vid_channel(u8 channel)
+{
+       return select_i2c_ch_pca9547(channel);
+}
+
 int config_board_mux(int ctrl_type)
 {
        u8 reg5;
@@ -149,6 +158,9 @@ int board_init(void)
 {
        char *env_hwconfig;
        u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
+#ifdef CONFIG_FSL_MC_ENET
+       u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE;
+#endif
        u32 val;
 
        init_final_memctl_regs();
@@ -170,6 +182,18 @@ int board_init(void)
 
        QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN);
 
+#ifdef CONFIG_FSL_LS_PPA
+       ppa_init();
+#endif
+
+#ifdef CONFIG_FSL_MC_ENET
+       /* invert AQR405 IRQ pins polarity */
+       out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK);
+#endif
+#ifdef CONFIG_FSL_CAAM
+       sec_init();
+#endif
+
        return 0;
 }
 
@@ -184,6 +208,9 @@ int misc_init_r(void)
        if (hwconfig("sdhc"))
                config_board_mux(MUX_TYPE_SDHC);
 
+       if (adjust_vdd(0))
+               printf("Warning: Adjusting core voltage failed.\n");
+
        return 0;
 }
 
@@ -193,7 +220,7 @@ void detail_board_ddr_info(void)
        print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, "");
        print_ddr_info(0);
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
-       if (gd->bd->bi_dram[2].size) {
+       if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) {
                puts("\nDP-DDR ");
                print_size(gd->bd->bi_dram[2].size, "");
                print_ddr_info(CONFIG_DP_DDR_CTRL);
@@ -201,50 +228,22 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-int dram_init(void)
-{
-       gd->ram_size = initdram(0);
-
-       return 0;
-}
-
 #if defined(CONFIG_ARCH_MISC_INIT)
 int arch_misc_init(void)
 {
-#ifdef CONFIG_FSL_DEBUG_SERVER
-       debug_server_init();
-#endif
-
        return 0;
 }
 #endif
 
-unsigned long get_dram_size_to_hide(void)
-{
-       unsigned long dram_to_hide = 0;
-
-/* Carve the Debug Server private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_DEBUG_SERVER
-       dram_to_hide += debug_server_get_dram_block_size();
-#endif
-
-/* Carve the MC private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_MC_ENET
-       dram_to_hide += mc_get_dram_block_size();
-#endif
-
-       return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
-}
-
 #ifdef CONFIG_FSL_MC_ENET
 void fdt_fixup_board_enet(void *fdt)
 {
        int offset;
 
-       offset = fdt_path_offset(fdt, "/fsl-mc");
+       offset = fdt_path_offset(fdt, "/soc/fsl-mc");
 
        if (offset < 0)
-               offset = fdt_path_offset(fdt, "/fsl,dprc@0");
+               offset = fdt_path_offset(fdt, "/fsl-mc");
 
        if (offset < 0) {
                printf("%s: ERROR: fsl-mc node not found in device tree (error %d)\n",
@@ -257,12 +256,16 @@ void fdt_fixup_board_enet(void *fdt)
        else
                fdt_status_fail(fdt, offset);
 }
+
+void board_quiesce_devices(void)
+{
+       fsl_mc_ldpaa_exit(gd->bd);
+}
 #endif
 
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {
-       int err;
        u64 base[CONFIG_NR_DRAM_BANKS];
        u64 size[CONFIG_NR_DRAM_BANKS];
 
@@ -274,13 +277,22 @@ int ft_board_setup(void *blob, bd_t *bd)
        base[1] = gd->bd->bi_dram[1].start;
        size[1] = gd->bd->bi_dram[1].size;
 
+#ifdef CONFIG_RESV_RAM
+       /* reduce size if reserved memory is within this bank */
+       if (gd->arch.resv_ram >= base[0] &&
+           gd->arch.resv_ram < base[0] + size[0])
+               size[0] = gd->arch.resv_ram - base[0];
+       else if (gd->arch.resv_ram >= base[1] &&
+                gd->arch.resv_ram < base[1] + size[1])
+               size[1] = gd->arch.resv_ram - base[1];
+#endif
+
        fdt_fixup_memory_banks(blob, base, size, 2);
 
+       fsl_fdt_fixup_dr_usb(blob, bd);
+
 #ifdef CONFIG_FSL_MC_ENET
        fdt_fixup_board_enet(blob);
-       err = fsl_mc_ldpaa_exit(bd);
-       if (err)
-               return err;
 #endif
 
        return 0;