]> git.sur5r.net Git - u-boot/blobdiff - board/freescale/m5235evb/m5235evb.c
Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/master
[u-boot] / board / freescale / m5235evb / m5235evb.c
index 585854cd91b7f7ef4c500f82290d0f0fdadfd22b..bd8a4e5e68838c1ee43668d8fc38b9c206979bc3 100644 (file)
@@ -37,7 +37,7 @@ int checkboard(void)
        return 0;
 };
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
        volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM);
        volatile gpio_t *gpio = (volatile gpio_t *)(MMAP_GPIO);
@@ -75,9 +75,11 @@ long int initdram(int board_type)
                sdram->dacr0 =
                    SDRAMC_DARCn_BA(CFG_SDRAM_BASE) | SDRAMC_DARCn_CASL_C1 |
                    SDRAMC_DARCn_CBM_CMD20 | SDRAMC_DARCn_PS_32;
+               asm("nop");
 
                /* Initialize DMR0 */
                sdram->dmr0 = ((dramsize - 1) & 0xFFFC0000) | SDRAMC_DMRn_V;
+               asm("nop");
 
                /* Set IP (bit 3) in DACR */
                sdram->dacr0 |= SDRAMC_DARCn_IP;
@@ -100,6 +102,7 @@ long int initdram(int board_type)
 
                /* Finish the configuration by issuing the MRS. */
                sdram->dacr0 |= SDRAMC_DARCn_IMRS;
+               asm("nop");
 
                /* Write to the SDRAM Mode Register */
                *(u32 *) (CFG_SDRAM_BASE + 0x400) = 0xA5A59696;