powerpc/t4rdb: fix cpld reset altbank

[u-boot] / board / freescale / m5249evb / m5249evb.c

diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c
index b0bf4139429d45adeb2164b5d778f334451b5363..7ae842c3d3c6770c1d464c539ed695808af26429 100644 (file)
--- a/board/freescale/m5249evb/m5249evb.c
+++ b/board/freescale/m5249evb/m5249evb.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -26,10 +10,6 @@
 #include <malloc.h>
 #include <asm/immap.h>
 
-
-/* Prototypes */
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
 int checkboard (void) {
        ulong val;
        uchar val8;
@@ -42,14 +22,14 @@ int checkboard (void) {
        /*
         * Set LED on
         */
-       val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CFG_GPIO1_LED;
+       val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CONFIG_SYS_GPIO1_LED;
        mbar2_writeLong(MCFSIM_GPIO1_OUT, val);   /* Set LED on */
 
        return 0;
 };
 
 
-long int initdram (int board_type) {
+phys_size_t initdram (int board_type) {
        unsigned long   junk = 0xa5a59696;
 
        /*
@@ -57,13 +37,13 @@ long int initdram (int board_type) {
         *      RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
         */
 
-#ifdef CFG_FAST_CLK
+#ifdef CONFIG_SYS_FAST_CLK
        /*
         * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
         * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
         */
        mbar_writeShort(MCFSIM_DCR, 0x8239);
-#elif CFG_PLL_BYPASS
+#elif CONFIG_SYS_PLL_BYPASS
        /*
         * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
         * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
@@ -101,7 +81,7 @@ long int initdram (int board_type) {
        mbar_writeLong(MCFSIM_DACR0, 0x0000b364);  /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
        *((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */
 
-       return CFG_SDRAM_SIZE * 1024 * 1024;
+       return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
 };
 
 
@@ -111,4 +91,3 @@ int testdram (void) {
 
        return (0);
 }
-