Merge branch 'next'

[u-boot] / board / freescale / mpc5121ads / mpc5121ads.c

diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c
index a0d7a82e4bb5ddbd5cc9c1303a7bb51f64d70fae..97eeab3a23415ab34b0202e326532b11020eec1c 100644 (file)
--- a/board/freescale/mpc5121ads/mpc5121ads.c
+++ b/board/freescale/mpc5121ads/mpc5121ads.c
@@ -31,6 +31,7 @@
 #ifdef CONFIG_MISC_INIT_R
 #include <i2c.h>
 #endif
+#include <net.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
@@ -52,7 +53,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SCCR2_CLOCKS_EN        (CLOCK_SCCR2_DIU_EN |           \
                         CLOCK_SCCR2_I2C_EN |           \
                         CLOCK_SCCR2_MEM_EN |           \
-                        CLOCK_SCCR2_SPDIF_EN)
+                        CLOCK_SCCR2_SPDIF_EN |         \
+                        CLOCK_SCCR2_USB1_EN |          \
+                        CLOCK_SCCR2_USB2_EN)
 
 void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip);
 
@@ -101,7 +104,7 @@ int board_early_init_f(void)
         * write commands in order to establish the device ID.
         */
 
-#ifdef CONFIG_ADS5121_REV2
+#ifdef CONFIG_MPC5121ADS_REV2
        out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0xC1);
 #else
        if (in_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) & 0x04) {
@@ -133,11 +136,105 @@ int board_early_init_f(void)
        return 0;
 }
 
+int is_micron(void){
+
+       ushort brd_rev = *(vu_short *)(CONFIG_SYS_CPLD_BASE + 0x00);
+       uchar macaddr[6];
+       u32 brddate, macchk, ismicron;
+
+       /*
+        * MAC address has serial number with date of manufacture
+        * Boards made before Nov-08 #1180 use Micron memory;
+        * 001e59 is the STx vendor #
+        * Default is Elpida since it works for both but is slightly slower
+        */
+       ismicron = 0;
+       if (brd_rev >= 0x0400 && eth_getenv_enetaddr("ethaddr", macaddr)) {
+               brddate = (macaddr[3] << 16) + (macaddr[4] << 8) + macaddr[5];
+               macchk = (macaddr[0] << 16) + (macaddr[1] << 8) + macaddr[2];
+               debug("brddate = %d\n\t", brddate);
+
+               if (macchk == 0x001e59 && brddate <= 8111180)
+                       ismicron = 1;
+       } else if (brd_rev < 0x400) {
+               ismicron = 1;
+       }
+       debug("Using %s Memory settings\n\t",
+               ismicron ? "Micron" : "Elpida");
+       return(ismicron);
+}
+
 phys_size_t initdram(int board_type)
 {
        u32 msize = 0;
-
-       msize = fixed_sdram();
+       /*
+        * Elpida MDDRC and initialization settings are an alternative
+        * to the Default Micron ones for all but the earliest Rev 4 boards
+        */
+       ddr512x_config_t elpida_mddrc_config = {
+               .ddr_sys_config   = CONFIG_SYS_MDDRC_SYS_CFG_ELPIDA,
+               .ddr_time_config0 = CONFIG_SYS_MDDRC_TIME_CFG0,
+               .ddr_time_config1 = CONFIG_SYS_MDDRC_TIME_CFG1_ELPIDA,
+               .ddr_time_config2 = CONFIG_SYS_MDDRC_TIME_CFG2_ELPIDA,
+       };
+
+       u32 elpida_init_sequence[] = {
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_PCHG_ALL,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_RFSH,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_RFSH,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_EM2,
+               CONFIG_SYS_DDRCMD_EM3,
+               CONFIG_SYS_DDRCMD_EN_DLL,
+               CONFIG_SYS_ELPIDA_RES_DLL,
+               CONFIG_SYS_DDRCMD_PCHG_ALL,
+               CONFIG_SYS_DDRCMD_RFSH,
+               CONFIG_SYS_DDRCMD_RFSH,
+               CONFIG_SYS_DDRCMD_RFSH,
+               CONFIG_SYS_ELPIDA_INIT_DEV_OP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_OCD_DEFAULT,
+               CONFIG_SYS_ELPIDA_OCD_EXIT,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP,
+               CONFIG_SYS_DDRCMD_NOP
+       };
+
+       if (is_micron()) {
+               msize = fixed_sdram(NULL, NULL, 0);
+       } else {
+               msize = fixed_sdram(&elpida_mddrc_config,
+                               elpida_init_sequence,
+                               sizeof(elpida_init_sequence)/sizeof(u32));
+       }
 
        return msize;
 }
@@ -156,20 +253,15 @@ int misc_init_r(void)
        /* Verify if enabled */
        tmp_val = 0;
        i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
-       debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
+       debug("DVI Encoder Read: 0x%02x\n", tmp_val);
 
        tmp_val = 0x10;
        i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
        /* Verify if enabled */
        tmp_val = 0;
        i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
-       debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
+       debug("DVI Encoder Read: 0x%02x\n", tmp_val);
 
-#ifdef CONFIG_FSL_DIU_FB
-# if   !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
-       mpc5121_diu_init();
-# endif
-#endif
        return 0;
 }
 
@@ -239,7 +331,7 @@ int checkboard (void)
        volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
        u32 spridr = in_be32(&im->sysconf.spridr);
 
-       printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
+       printf ("Board: MPC5121ADS rev. 0x%04x (CPLD rev. 0x%02x)\n",
                brd_rev, cpld_rev);
 
        /* initialize function mux & slew rate IO inter alia on IO Pins  */
@@ -255,6 +347,5 @@ int checkboard (void)
 void ft_board_setup(void *blob, bd_t *bd)
 {
        ft_cpu_setup(blob, bd);
-       fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 }
 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */