Generic udelay() with watchdog support

[u-boot] / board / freescale / mpc8313erdb / sdram.c

diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
index 99e8a43f5d3644355a1b931d00757a2d4bd45ee7..0c4fd6854d46757e9eeb96997eee2d58b2aa4257 100644 (file)
--- a/board/freescale/mpc8313erdb/sdram.c
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -72,7 +72,7 @@ static long fixed_sdram(void)
         * Erratum DDR3 requires a 50ms delay after clearing DDRCDR[DDR_cfg],
         * or the DDR2 controller may fail to initialize correctly.
         */
-       udelay(50000);
+       __udelay(50000);
 
        im->ddr.csbnds[0].csbnds = (msize - 1) >> 24;
        im->ddr.cs_config[0] = CONFIG_SYS_DDR_CONFIG;
@@ -110,7 +110,7 @@ static long fixed_sdram(void)
 phys_size_t initdram(int board_type)
 {
        volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;
-       volatile lbus83xx_t *lbc = &im->lbus;
+       volatile fsl_lbus_t *lbc = &im->lbus;
        u32 msize;
 
        if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)