powerpc: 74xx_7xx: remove 74xx_7xx cpu support

[u-boot] / board / freescale / mpc8349emds / pci.c

diff --git a/board/freescale/mpc8349emds/pci.c b/board/freescale/mpc8349emds/pci.c
index a783bebad32a05fa3360d5d60d02b71de014c7da..9f7324feddfe10e30ada3a457f9837e1d266fb93 100644 (file)
--- a/board/freescale/mpc8349emds/pci.c
+++ b/board/freescale/mpc8349emds/pci.c
@@ -1,22 +1,7 @@
 /*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
  *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <asm/mmu.h>
@@ -29,25 +14,23 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_PCI
-
 static struct pci_region pci1_regions[] = {
        {
-               bus_start: CFG_PCI1_MEM_BASE,
-               phys_start: CFG_PCI1_MEM_PHYS,
-               size: CFG_PCI1_MEM_SIZE,
+               bus_start: CONFIG_SYS_PCI1_MEM_BASE,
+               phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
+               size: CONFIG_SYS_PCI1_MEM_SIZE,
                flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
        },
        {
-               bus_start: CFG_PCI1_IO_BASE,
-               phys_start: CFG_PCI1_IO_PHYS,
-               size: CFG_PCI1_IO_SIZE,
+               bus_start: CONFIG_SYS_PCI1_IO_BASE,
+               phys_start: CONFIG_SYS_PCI1_IO_PHYS,
+               size: CONFIG_SYS_PCI1_IO_SIZE,
                flags: PCI_REGION_IO
        },
        {
-               bus_start: CFG_PCI1_MMIO_BASE,
-               phys_start: CFG_PCI1_MMIO_PHYS,
-               size: CFG_PCI1_MMIO_SIZE,
+               bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
+               phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
+               size: CONFIG_SYS_PCI1_MMIO_SIZE,
                flags: PCI_REGION_MEM
        },
 };
@@ -55,26 +38,27 @@ static struct pci_region pci1_regions[] = {
 #ifdef CONFIG_MPC83XX_PCI2
 static struct pci_region pci2_regions[] = {
        {
-               bus_start: CFG_PCI2_MEM_BASE,
-               phys_start: CFG_PCI2_MEM_PHYS,
-               size: CFG_PCI2_MEM_SIZE,
+               bus_start: CONFIG_SYS_PCI2_MEM_BASE,
+               phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
+               size: CONFIG_SYS_PCI2_MEM_SIZE,
                flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
        },
        {
-               bus_start: CFG_PCI2_IO_BASE,
-               phys_start: CFG_PCI2_IO_PHYS,
-               size: CFG_PCI2_IO_SIZE,
+               bus_start: CONFIG_SYS_PCI2_IO_BASE,
+               phys_start: CONFIG_SYS_PCI2_IO_PHYS,
+               size: CONFIG_SYS_PCI2_IO_SIZE,
                flags: PCI_REGION_IO
        },
        {
-               bus_start: CFG_PCI2_MMIO_BASE,
-               phys_start: CFG_PCI2_MMIO_PHYS,
-               size: CFG_PCI2_MMIO_SIZE,
+               bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
+               phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
+               size: CONFIG_SYS_PCI2_MMIO_SIZE,
                flags: PCI_REGION_MEM
        },
 };
 #endif
 
+#ifndef CONFIG_PCISLAVE
 void pib_init(void)
 {
        u8 val8, orig_i2c_bus;
@@ -134,7 +118,7 @@ void pib_init(void)
 
 void pci_init_board(void)
 {
-       volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+       volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
        volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
        volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
 #ifndef CONFIG_MPC83XX_PCI2
@@ -151,19 +135,58 @@ void pci_init_board(void)
        udelay(2000);
 
        /* Configure PCI Local Access Windows */
-       pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+       pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
        pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
 
-       pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+       pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
 
        udelay(2000);
 
 #ifndef CONFIG_MPC83XX_PCI2
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 #else
-       mpc83xx_pci_init(2, reg, 0);
+       mpc83xx_pci_init(2, reg);
 #endif
 }
 
-#endif /* CONFIG_PCI */
+#else
+void pci_init_board(void)
+{
+       volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
+       volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
+       volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
+       struct pci_region *reg[] = { pci1_regions };
+
+       /* Configure PCI Local Access Windows */
+       pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
+       pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
+
+       pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
+       pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
+
+       mpc83xx_pci_init(1, reg);
+
+       /* Configure PCI Inbound Translation Windows (3 1MB windows) */
+       pci_ctrl->pitar0 = 0x0;
+       pci_ctrl->pibar0 = 0x0;
+       pci_ctrl->piwar0 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+                          PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
+
+       pci_ctrl->pitar1  = 0x0;
+       pci_ctrl->pibar1  = 0x0;
+       pci_ctrl->piebar1 = 0x0;
+       pci_ctrl->piwar1  = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+                           PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
+
+       pci_ctrl->pitar2  = 0x0;
+       pci_ctrl->pibar2  = 0x0;
+       pci_ctrl->piebar2 = 0x0;
+       pci_ctrl->piwar2  = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+                           PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
+
+       /* Unlock the configuration bit */
+       mpc83xx_pcislave_unlock(0);
+       printf("PCI:   Agent mode enabled\n");
+}
+#endif /* CONFIG_PCISLAVE */