FSL DDR: Convert MPC8541CDS to new DDR code.

[u-boot] / board / freescale / mpc8349itx / mpc8349itx.c

diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index 704f9636bcab0972806bef10a63d65eeec0f1dfe..d3fc560df3586f6c5465741ebaa8d196287ccbcd 100644 (file)
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -128,7 +128,7 @@ volatile static struct pci_controller hose[] = {
 };
 #endif                         /* CONFIG_PCI */
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
        volatile immap_t *im = (immap_t *) CFG_IMMR;
        u32 msize = 0;
@@ -273,13 +273,13 @@ int misc_init_r(void)
        static u8 eeprom_data[] =       /* HRCW data */
        {
                0xAA, 0x55, 0xAA,       /* Preamble */
-               0x7C,                   /* ACS=0, BYTE_EN=1111, CONT=1 */
-               0x02, 0x40,             /* RCWL ADDR=0x0_0900 */
+               0x7C,                   /* ACS=0, BYTE_EN=1111, CONT=1 */
+               0x02, 0x40,             /* RCWL ADDR=0x0_0900 */
                (CFG_HRCW_LOW >> 24) & 0xFF,
                (CFG_HRCW_LOW >> 16) & 0xFF,
                (CFG_HRCW_LOW >> 8) & 0xFF,
                CFG_HRCW_LOW & 0xFF,
-               0x7C,                   /* ACS=0, BYTE_EN=1111, CONT=1 */
+               0x7C,                   /* ACS=0, BYTE_EN=1111, CONT=1 */
                0x02, 0x41,             /* RCWH ADDR=0x0_0904 */
                (CFG_HRCW_HIGH >> 24) & 0xFF,
                (CFG_HRCW_HIGH >> 16) & 0xFF,