FSL DDR: Convert MPC8560ADS to new DDR code.

[u-boot] / board / freescale / mpc8360emds / mpc8360emds.c

diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c
index d90cdb3d3c270d0a4e617dd4c747abac0fbe127f..5c3b5dbc934d0f98aa7e704dd99d03d7db92ecea 100644 (file)
--- a/board/freescale/mpc8360emds/mpc8360emds.c
+++ b/board/freescale/mpc8360emds/mpc8360emds.c
@@ -98,11 +98,8 @@ int board_early_init_f(void)
        /* Enable flash write */
        bcsr[0xa] &= ~0x04;
 
-       /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2 h/w bug workaround) */
-       if (immr->sysconf.spridr == SPR_8360_REV20 ||
-           immr->sysconf.spridr == SPR_8360E_REV20 ||
-           immr->sysconf.spridr == SPR_8360_REV21 ||
-           immr->sysconf.spridr == SPR_8360E_REV21)
+       /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2.x h/w bug workaround) */
+       if (REVID_MAJOR(immr->sysconf.spridr) == 2)
                bcsr[0xe] = 0x30;
 
        /* Enable second UART */
@@ -125,7 +122,7 @@ extern void ddr_enable_ecc(unsigned int dram_size);
 int fixed_sdram(void);
 void sdram_init(void);
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
        volatile immap_t *im = (immap_t *) CFG_IMMR;
        u32 msize = 0;
@@ -308,8 +305,8 @@ void ft_board_setup(void *blob, bd_t *bd)
         * if on mpc8360ea rev. 2.1,
         * change both ucc phy-connection-types from rgmii-id to rgmii-rxid
         */
-       if (immr->sysconf.spridr == SPR_8360_REV21 ||
-           immr->sysconf.spridr == SPR_8360E_REV21) {
+       if ((REVID_MAJOR(immr->sysconf.spridr) == 2) &&
+           (REVID_MINOR(immr->sysconf.spridr) == 1)) {
                int nodeoffset;
                const char *prop;
                int path;