FSL DDR: Convert MPC8560ADS to new DDR code.

[u-boot] / board / freescale / mpc8360emds / mpc8360emds.c

diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c
index e050cd4395ab28fcc6c59539825421a755617e9f..5c3b5dbc934d0f98aa7e704dd99d03d7db92ecea 100644 (file)
--- a/board/freescale/mpc8360emds/mpc8360emds.c
+++ b/board/freescale/mpc8360emds/mpc8360emds.c
@@ -15,19 +15,13 @@
 #include <ioports.h>
 #include <mpc83xx.h>
 #include <i2c.h>
-#include <spd.h>
 #include <miiphy.h>
 #if defined(CONFIG_PCI)
 #include <pci.h>
 #endif
-#if defined(CONFIG_SPD_EEPROM)
 #include <spd_sdram.h>
-#else
 #include <asm/mmu.h>
-#endif
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#elif defined(CONFIG_OF_LIBFDT)
+#if defined(CONFIG_OF_LIBFDT)
 #include <libfdt.h>
 #endif
 #if defined(CONFIG_PQ_MDS_PIB)
@@ -87,6 +81,11 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
        {0,  1, 3, 0, 2}, /* MDIO */
        {0,  2, 1, 0, 1}, /* MDC */
 
+       {5,  0, 1, 0, 2}, /* UART2_SOUT */
+       {5,  1, 2, 0, 3}, /* UART2_CTS */
+       {5,  2, 1, 0, 1}, /* UART2_RTS */
+       {5,  3, 2, 0, 2}, /* UART2_SIN */
+
        {0,  0, 0, 0, QE_IOP_TAB_END}, /* END of table */
 };
 
@@ -99,13 +98,13 @@ int board_early_init_f(void)
        /* Enable flash write */
        bcsr[0xa] &= ~0x04;
 
-       /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2 h/w bug workaround) */
-       if (immr->sysconf.spridr == SPR_8360_REV20 ||
-           immr->sysconf.spridr == SPR_8360E_REV20 ||
-           immr->sysconf.spridr == SPR_8360_REV21 ||
-           immr->sysconf.spridr == SPR_8360E_REV21)
+       /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2.x h/w bug workaround) */
+       if (REVID_MAJOR(immr->sysconf.spridr) == 2)
                bcsr[0xe] = 0x30;
 
+       /* Enable second UART */
+       bcsr[0x9] &= ~0x01;
+
        return 0;
 }
 
@@ -123,7 +122,7 @@ extern void ddr_enable_ecc(unsigned int dram_size);
 int fixed_sdram(void);
 void sdram_init(void);
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
        volatile immap_t *im = (immap_t *) CFG_IMMR;
        u32 msize = 0;
@@ -295,19 +294,54 @@ void sdram_init(void)
 #if defined(CONFIG_OF_BOARD_SETUP)
 void ft_board_setup(void *blob, bd_t *bd)
 {
-#if defined(CONFIG_OF_FLAT_TREE)
-       u32 *p;
-       int len;
-
-       p = ft_get_prop(blob, "/memory/reg", &len);
-       if (p != NULL) {
-               *p++ = cpu_to_be32(bd->bi_memstart);
-               *p = cpu_to_be32(bd->bi_memsize);
-       }
-#endif
+       const immap_t *immr = (immap_t *)CFG_IMMR;
+
        ft_cpu_setup(blob, bd);
 #ifdef CONFIG_PCI
        ft_pci_setup(blob, bd);
 #endif
+       /*
+        * mpc8360ea pb mds errata 2: RGMII timing
+        * if on mpc8360ea rev. 2.1,
+        * change both ucc phy-connection-types from rgmii-id to rgmii-rxid
+        */
+       if ((REVID_MAJOR(immr->sysconf.spridr) == 2) &&
+           (REVID_MINOR(immr->sysconf.spridr) == 1)) {
+               int nodeoffset;
+               const char *prop;
+               int path;
+
+               nodeoffset = fdt_path_offset(blob, "/aliases");
+               if (nodeoffset >= 0) {
+#if defined(CONFIG_HAS_ETH0)
+                       /* fixup UCC 1 if using rgmii-id mode */
+                       prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
+                       if (prop) {
+                               path = fdt_path_offset(blob, prop);
+                               prop = fdt_getprop(blob, path,
+                                                  "phy-connection-type", 0);
+                               if (prop && (strcmp(prop, "rgmii-id") == 0))
+                                       fdt_setprop(blob, path,
+                                                   "phy-connection-type",
+                                                   "rgmii-rxid",
+                                                   sizeof("rgmii-rxid"));
+                       }
+#endif
+#if defined(CONFIG_HAS_ETH1)
+                       /* fixup UCC 2 if using rgmii-id mode */
+                       prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
+                       if (prop) {
+                               path = fdt_path_offset(blob, prop);
+                               prop = fdt_getprop(blob, path,
+                                                  "phy-connection-type", 0);
+                               if (prop && (strcmp(prop, "rgmii-id") == 0))
+                                       fdt_setprop(blob, path,
+                                                   "phy-connection-type",
+                                                   "rgmii-rxid",
+                                                   sizeof("rgmii-rxid"));
+                       }
+#endif
+               }
+       }
 }
 #endif