#include <ioports.h>
#include <mpc83xx.h>
#include <i2c.h>
-#include <spd.h>
#include <miiphy.h>
#if defined(CONFIG_PCI)
#include <pci.h>
#endif
-#if defined(CONFIG_SPD_EEPROM)
#include <spd_sdram.h>
-#else
#include <asm/mmu.h>
-#endif
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#endif
/* Enable flash write */
bcsr[0xa] &= ~0x04;
- /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2 h/w bug workaround) */
- if (immr->sysconf.spridr == SPR_8360_REV20 ||
- immr->sysconf.spridr == SPR_8360E_REV20 ||
- immr->sysconf.spridr == SPR_8360_REV21 ||
- immr->sysconf.spridr == SPR_8360E_REV21)
+ /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2.x h/w bug workaround) */
+ if (REVID_MAJOR(immr->sysconf.spridr) == 2)
bcsr[0xe] = 0x30;
/* Enable second UART */
int fixed_sdram(void);
void sdram_init(void);
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
volatile immap_t *im = (immap_t *) CFG_IMMR;
u32 msize = 0;
* if on mpc8360ea rev. 2.1,
* change both ucc phy-connection-types from rgmii-id to rgmii-rxid
*/
- if (immr->sysconf.spridr == SPR_8360_REV21 ||
- immr->sysconf.spridr == SPR_8360E_REV21) {
+ if ((REVID_MAJOR(immr->sysconf.spridr) == 2) &&
+ (REVID_MINOR(immr->sysconf.spridr) == 1)) {
int nodeoffset;
const char *prop;
int path;