/*
- * Copyright (C) 2007 Freescale Semiconductor, Inc.
+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/mmu.h>
#include <i2c.h>
#include <fdt_support.h>
#include <asm/fsl_i2c.h>
-#include <asm/fsl_serdes.h>
+#include <asm/fsl_mpc83xx_serdes.h>
-#if defined(CONFIG_PCI)
static struct pci_region pci_regions[] = {
{
bus_start: CONFIG_SYS_PCI_MEM_BASE,
udelay(2000);
- mpc83xx_pci_init(1, reg, 0);
+ mpc83xx_pci_init(1, reg);
skip_pci:
/* There is no PEX in MPC8379 parts. */
if (PARTID_NO_E(spridr) == SPR_8379)
return;
+ if (pex2)
+ fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX_X2,
+ FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+ else
+ fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
+ FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+
/* Configure the clock for PCIE controller */
clrsetbits_be32(&clk->sccr, SCCR_PCIEXP1CM | SCCR_PCIEXP2CM,
SCCR_PCIEXP1CM_1 | SCCR_PCIEXP2CM_1);
out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR);
out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB);
- if (pex2)
- fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX_X2,
- FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
- else
- fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
- FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
-
- mpc83xx_pcie_init(pex2 ? 1 : 2, pcie_reg, 0);
+ mpc83xx_pcie_init(pex2 ? 1 : 2, pcie_reg);
}
void ft_pcie_fixup(void *blob, bd_t *bd)
do_fixup_by_path(blob, "pci2", "status", status,
strlen(status) + 1, 1);
}
-#endif /* CONFIG_PCI */