MPC8610HPCD: Report board id, board version and fpga version.

[u-boot] / board / freescale / mpc837xerdb / mpc837xerdb.c

diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 2d425952b91284b9a5bec43826427e0155d63b36..aaefc189913e4bb4c29238bcfd72ad59014ca652 100644 (file)
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -14,11 +14,11 @@
 
 #include <common.h>
 #include <i2c.h>
-#include <spd.h>
 #include <asm/io.h>
-#if defined(CONFIG_SPD_EEPROM)
+#include <asm/fsl_serdes.h>
+#include <fdt_support.h>
 #include <spd_sdram.h>
-#endif
+#include <vsc7385.h>
 
 #if defined(CFG_DRAM_TEST)
 int
@@ -59,17 +59,12 @@ testdram(void)
 }
 #endif
 
-int board_early_init_f(void)
-{
-       return 0;
-}
-
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
 void ddr_enable_ecc(unsigned int dram_size);
 #endif
 int fixed_sdram(void);
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
        immap_t *im = (immap_t *) CFG_IMMR;
        u32 msize = 0;
@@ -138,6 +133,59 @@ int checkboard(void)
        return 0;
 }
 
+int board_early_init_f(void)
+{
+#ifdef CONFIG_FSL_SERDES
+       immap_t *immr = (immap_t *)CFG_IMMR;
+       u32 spridr = in_be32(&immr->sysconf.spridr);
+
+       /* we check only part num, and don't look for CPU revisions */
+       switch (PARTID_NO_E(spridr)) {
+       case SPR_8377:
+               fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
+                                FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+               fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
+                                FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+               break;
+       case SPR_8378:
+               fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
+                                FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+               break;
+       case SPR_8379:
+               fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
+                                FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+               fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
+                                FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+               break;
+       default:
+               printf("serdes not configured: unknown CPU part number: "
+                      "%04x\n", spridr >> 16);
+               break;
+       }
+#endif /* CONFIG_FSL_SERDES */
+       return 0;
+}
+
+/*
+ * Miscellaneous late-boot configurations
+ *
+ * If a VSC7385 microcode image is present, then upload it.
+*/
+int misc_init_r(void)
+{
+       int rc = 0;
+
+#ifdef CONFIG_VSC7385_IMAGE
+       if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
+               CONFIG_VSC7385_IMAGE_SIZE)) {
+               puts("Failure uploading VSC7385 microcode.\n");
+               rc = 1;
+       }
+#endif
+
+       return rc;
+}
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 
 void ft_board_setup(void *blob, bd_t *bd)
@@ -146,5 +194,6 @@ void ft_board_setup(void *blob, bd_t *bd)
        ft_pci_setup(blob, bd);
 #endif
        ft_cpu_setup(blob, bd);
+       fdt_fixup_dr_usb(blob, bd);
 }
 #endif /* CONFIG_OF_BOARD_SETUP */