fsl: update CRC after setting EEPROM identifier

[u-boot] / board / freescale / mpc8544ds / ddr.c

diff --git a/board/freescale/mpc8544ds/ddr.c b/board/freescale/mpc8544ds/ddr.c
index 34f84a2656212e6655465e0289d2b9a897866fee..b8330eb961de4d03e2edf39d2219699656633de2 100644 (file)
--- a/board/freescale/mpc8544ds/ddr.c
+++ b/board/freescale/mpc8544ds/ddr.c
@@ -75,6 +75,9 @@ void fsl_ddr_board_options(memctl_options_t *popts,
         */
        popts->write_data_delay = 3;
 
+       /* 2T timing enable */
+       popts->twoT_en = 1;
+
        /*
         * Factors to consider for half-strength driver enable:
         *      - number of DIMMs installed