fsl: update CRC after setting EEPROM identifier

[u-boot] / board / freescale / mpc8544ds / ddr.c

diff --git a/board/freescale/mpc8544ds/ddr.c b/board/freescale/mpc8544ds/ddr.c
index bbb5ee2c4ab16cb2aef31b067d0555c193e616d2..b8330eb961de4d03e2edf39d2219699656633de2 100644 (file)
--- a/board/freescale/mpc8544ds/ddr.c
+++ b/board/freescale/mpc8544ds/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -37,7 +38,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:
@@ -72,6 +75,9 @@ void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
         */
        popts->write_data_delay = 3;
 
+       /* 2T timing enable */
+       popts->twoT_en = 1;
+
        /*
         * Factors to consider for half-strength driver enable:
         *      - number of DIMMs installed