85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards

[u-boot] / board / freescale / mpc8544ds / mpc8544ds.c

diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 13c55fd37f4ea532bf82d65198c02248cdddad71..7ff5a9bb8327de09dd41f3ca47c942f8ec92c02e 100644 (file)
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -139,22 +139,22 @@ pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE3_MEM_BASE,
+                              CONFIG_SYS_PCIE3_MEM_BUS,
                               CONFIG_SYS_PCIE3_MEM_PHYS,
                               CONFIG_SYS_PCIE3_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE3_IO_BASE,
+                              CONFIG_SYS_PCIE3_IO_BUS,
                               CONFIG_SYS_PCIE3_IO_PHYS,
                               CONFIG_SYS_PCIE3_IO_SIZE,
                               PCI_REGION_IO);
 
-#ifdef CONFIG_SYS_PCIE3_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE3_MEM_BUS2
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE3_MEM_BASE2,
+                              CONFIG_SYS_PCIE3_MEM_BUS2,
                               CONFIG_SYS_PCIE3_MEM_PHYS2,
                               CONFIG_SYS_PCIE3_MEM_SIZE2,
                               PCI_REGION_MEM);
@@ -173,7 +173,7 @@ pci_init_board(void)
                 * Activate ULI1575 legacy chip by performing a fake
                 * memory access.  Needed to make ULI RTC work.
                 */
-               in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BASE);
+               in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BUS);
        } else {
                printf ("    PCIE3: disabled\n");
        }
@@ -188,7 +188,7 @@ pci_init_board(void)
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep = (host_agent == 5);
-       int pcie_configured  = io_sel & 6;
+       int pcie_configured  = io_sel >= 2;
        struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
@@ -206,22 +206,22 @@ pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE1_MEM_BASE,
+                              CONFIG_SYS_PCIE1_MEM_BUS,
                               CONFIG_SYS_PCIE1_MEM_PHYS,
                               CONFIG_SYS_PCIE1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE1_IO_BASE,
+                              CONFIG_SYS_PCIE1_IO_BUS,
                               CONFIG_SYS_PCIE1_IO_PHYS,
                               CONFIG_SYS_PCIE1_IO_SIZE,
                               PCI_REGION_IO);
 
-#ifdef CONFIG_SYS_PCIE1_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE1_MEM_BUS2
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE1_MEM_BASE2,
+                              CONFIG_SYS_PCIE1_MEM_BUS2,
                               CONFIG_SYS_PCIE1_MEM_PHYS2,
                               CONFIG_SYS_PCIE1_MEM_SIZE2,
                               PCI_REGION_MEM);
@@ -251,7 +251,7 @@ pci_init_board(void)
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
        struct pci_controller *hose = &pcie2_hose;
        int pcie_ep = (host_agent == 3);
-       int pcie_configured  = io_sel & 4;
+       int pcie_configured  = io_sel >= 4;
        struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
@@ -269,22 +269,22 @@ pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE2_MEM_BASE,
+                              CONFIG_SYS_PCIE2_MEM_BUS,
                               CONFIG_SYS_PCIE2_MEM_PHYS,
                               CONFIG_SYS_PCIE2_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE2_IO_BASE,
+                              CONFIG_SYS_PCIE2_IO_BUS,
                               CONFIG_SYS_PCIE2_IO_PHYS,
                               CONFIG_SYS_PCIE2_IO_SIZE,
                               PCI_REGION_IO);
 
-#ifdef CONFIG_SYS_PCIE2_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE2_MEM_BUS2
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE2_MEM_BASE2,
+                              CONFIG_SYS_PCIE2_MEM_BUS2,
                               CONFIG_SYS_PCIE2_MEM_PHYS2,
                               CONFIG_SYS_PCIE2_MEM_SIZE2,
                               PCI_REGION_MEM);
@@ -337,22 +337,22 @@ pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_MEM_BASE,
+                              CONFIG_SYS_PCI1_MEM_BUS,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_IO_BASE,
+                              CONFIG_SYS_PCI1_IO_BUS,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
 
-#ifdef CONFIG_SYS_PCIE3_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE3_MEM_BUS2
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE3_MEM_BASE2,
+                              CONFIG_SYS_PCIE3_MEM_BUS2,
                               CONFIG_SYS_PCIE3_MEM_PHYS2,
                               CONFIG_SYS_PCIE3_MEM_SIZE2,
                               PCI_REGION_MEM);