#include "../common/pixis.h"
#include "../common/sgmii_riser.h"
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
int checkboard (void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
dram_size *= 0x100000;
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
puts(" DDR: ");
return dram_size;
}
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR;
struct pci_controller *hose = &pcie3_hose;
int pcie_ep = (host_agent == 1);
- int pcie_configured = io_sel >= 1;
+ int pcie_configured = io_sel >= 6;
struct pci_region *r = hose->regions;
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCIE3_MEM_BASE,
+ CONFIG_SYS_PCIE3_MEM_BUS,
CONFIG_SYS_PCIE3_MEM_PHYS,
CONFIG_SYS_PCIE3_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
- CONFIG_SYS_PCIE3_IO_BASE,
+ CONFIG_SYS_PCIE3_IO_BUS,
CONFIG_SYS_PCIE3_IO_PHYS,
CONFIG_SYS_PCIE3_IO_SIZE,
PCI_REGION_IO);
-#ifdef CONFIG_SYS_PCIE3_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE3_MEM_BUS2
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCIE3_MEM_BASE2,
+ CONFIG_SYS_PCIE3_MEM_BUS2,
CONFIG_SYS_PCIE3_MEM_PHYS2,
CONFIG_SYS_PCIE3_MEM_SIZE2,
PCI_REGION_MEM);
* Activate ULI1575 legacy chip by performing a fake
* memory access. Needed to make ULI RTC work.
*/
- in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BASE);
+ in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BUS);
} else {
printf (" PCIE3: disabled\n");
}
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
struct pci_controller *hose = &pcie1_hose;
int pcie_ep = (host_agent == 5);
- int pcie_configured = io_sel & 6;
+ int pcie_configured = io_sel >= 2;
struct pci_region *r = hose->regions;
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCIE1_MEM_BASE,
+ CONFIG_SYS_PCIE1_MEM_BUS,
CONFIG_SYS_PCIE1_MEM_PHYS,
CONFIG_SYS_PCIE1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
- CONFIG_SYS_PCIE1_IO_BASE,
+ CONFIG_SYS_PCIE1_IO_BUS,
CONFIG_SYS_PCIE1_IO_PHYS,
CONFIG_SYS_PCIE1_IO_SIZE,
PCI_REGION_IO);
-#ifdef CONFIG_SYS_PCIE1_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE1_MEM_BUS2
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCIE1_MEM_BASE2,
+ CONFIG_SYS_PCIE1_MEM_BUS2,
CONFIG_SYS_PCIE1_MEM_PHYS2,
CONFIG_SYS_PCIE1_MEM_SIZE2,
PCI_REGION_MEM);
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
struct pci_controller *hose = &pcie2_hose;
int pcie_ep = (host_agent == 3);
- int pcie_configured = io_sel & 4;
+ int pcie_configured = io_sel >= 4;
struct pci_region *r = hose->regions;
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCIE2_MEM_BASE,
+ CONFIG_SYS_PCIE2_MEM_BUS,
CONFIG_SYS_PCIE2_MEM_PHYS,
CONFIG_SYS_PCIE2_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
- CONFIG_SYS_PCIE2_IO_BASE,
+ CONFIG_SYS_PCIE2_IO_BUS,
CONFIG_SYS_PCIE2_IO_PHYS,
CONFIG_SYS_PCIE2_IO_SIZE,
PCI_REGION_IO);
-#ifdef CONFIG_SYS_PCIE2_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE2_MEM_BUS2
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCIE2_MEM_BASE2,
+ CONFIG_SYS_PCIE2_MEM_BUS2,
CONFIG_SYS_PCIE2_MEM_PHYS2,
CONFIG_SYS_PCIE2_MEM_SIZE2,
PCI_REGION_MEM);
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCI1_MEM_BASE,
+ CONFIG_SYS_PCI1_MEM_BUS,
CONFIG_SYS_PCI1_MEM_PHYS,
CONFIG_SYS_PCI1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
- CONFIG_SYS_PCI1_IO_BASE,
+ CONFIG_SYS_PCI1_IO_BUS,
CONFIG_SYS_PCI1_IO_PHYS,
CONFIG_SYS_PCI1_IO_SIZE,
PCI_REGION_IO);
-#ifdef CONFIG_SYS_PCIE3_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE3_MEM_BUS2
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCIE3_MEM_BASE2,
+ CONFIG_SYS_PCIE3_MEM_BUS2,
CONFIG_SYS_PCIE3_MEM_PHYS2,
CONFIG_SYS_PCIE3_MEM_SIZE2,
PCI_REGION_MEM);
#if defined(CONFIG_OF_BOARD_SETUP)
extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
- struct pci_controller *hose);
+ struct pci_controller *hose);
void ft_board_setup(void *blob, bd_t *bd)
{