]> git.sur5r.net Git - u-boot/blobdiff - board/freescale/mpc8544ds/mpc8544ds.c
85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards
[u-boot] / board / freescale / mpc8544ds / mpc8544ds.c
index 977731289b1ff659064cd27593bcd46b78287e5a..7ff5a9bb8327de09dd41f3ca47c942f8ec92c02e 100644 (file)
@@ -139,22 +139,22 @@ pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE3_MEM_BASE,
+                              CONFIG_SYS_PCIE3_MEM_BUS,
                               CONFIG_SYS_PCIE3_MEM_PHYS,
                               CONFIG_SYS_PCIE3_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE3_IO_BASE,
+                              CONFIG_SYS_PCIE3_IO_BUS,
                               CONFIG_SYS_PCIE3_IO_PHYS,
                               CONFIG_SYS_PCIE3_IO_SIZE,
                               PCI_REGION_IO);
 
-#ifdef CONFIG_SYS_PCIE3_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE3_MEM_BUS2
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE3_MEM_BASE2,
+                              CONFIG_SYS_PCIE3_MEM_BUS2,
                               CONFIG_SYS_PCIE3_MEM_PHYS2,
                               CONFIG_SYS_PCIE3_MEM_SIZE2,
                               PCI_REGION_MEM);
@@ -173,7 +173,7 @@ pci_init_board(void)
                 * Activate ULI1575 legacy chip by performing a fake
                 * memory access.  Needed to make ULI RTC work.
                 */
-               in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BASE);
+               in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BUS);
        } else {
                printf ("    PCIE3: disabled\n");
        }
@@ -206,22 +206,22 @@ pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE1_MEM_BASE,
+                              CONFIG_SYS_PCIE1_MEM_BUS,
                               CONFIG_SYS_PCIE1_MEM_PHYS,
                               CONFIG_SYS_PCIE1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE1_IO_BASE,
+                              CONFIG_SYS_PCIE1_IO_BUS,
                               CONFIG_SYS_PCIE1_IO_PHYS,
                               CONFIG_SYS_PCIE1_IO_SIZE,
                               PCI_REGION_IO);
 
-#ifdef CONFIG_SYS_PCIE1_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE1_MEM_BUS2
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE1_MEM_BASE2,
+                              CONFIG_SYS_PCIE1_MEM_BUS2,
                               CONFIG_SYS_PCIE1_MEM_PHYS2,
                               CONFIG_SYS_PCIE1_MEM_SIZE2,
                               PCI_REGION_MEM);
@@ -269,22 +269,22 @@ pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE2_MEM_BASE,
+                              CONFIG_SYS_PCIE2_MEM_BUS,
                               CONFIG_SYS_PCIE2_MEM_PHYS,
                               CONFIG_SYS_PCIE2_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE2_IO_BASE,
+                              CONFIG_SYS_PCIE2_IO_BUS,
                               CONFIG_SYS_PCIE2_IO_PHYS,
                               CONFIG_SYS_PCIE2_IO_SIZE,
                               PCI_REGION_IO);
 
-#ifdef CONFIG_SYS_PCIE2_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE2_MEM_BUS2
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE2_MEM_BASE2,
+                              CONFIG_SYS_PCIE2_MEM_BUS2,
                               CONFIG_SYS_PCIE2_MEM_PHYS2,
                               CONFIG_SYS_PCIE2_MEM_SIZE2,
                               PCI_REGION_MEM);
@@ -337,22 +337,22 @@ pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_MEM_BASE,
+                              CONFIG_SYS_PCI1_MEM_BUS,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_IO_BASE,
+                              CONFIG_SYS_PCI1_IO_BUS,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
 
-#ifdef CONFIG_SYS_PCIE3_MEM_BASE2
+#ifdef CONFIG_SYS_PCIE3_MEM_BUS2
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCIE3_MEM_BASE2,
+                              CONFIG_SYS_PCIE3_MEM_BUS2,
                               CONFIG_SYS_PCIE3_MEM_PHYS2,
                               CONFIG_SYS_PCIE3_MEM_SIZE2,
                               PCI_REGION_MEM);