Merge branch 'quad100hd'

[u-boot] / board / freescale / mpc8548cds / mpc8548cds.c

diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 47e2dd86cba9113e819ce90bcb03a8dc09ccc3be..efe2a3a3def57c761ff648e6a5a7b71998475b6e 100644 (file)
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -27,7 +27,7 @@
 #include <asm/processor.h>
 #include <asm/immap_85xx.h>
 #include <asm/immap_fsl_pci.h>
-#include <spd.h>
+#include <spd_sdram.h>
 #include <miiphy.h>
 #include <libfdt.h>
 #include <fdt_support.h>
@@ -42,8 +42,6 @@ extern void ddr_enable_ecc(unsigned int dram_size);
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern long int spd_sdram(void);
-
 void local_bus_init(void);
 void sdram_init(void);
 
@@ -61,6 +59,7 @@ int checkboard (void)
        uint pci_slot = get_pci_slot ();
 
        uint cpu_board_rev = get_cpu_board_revision ();
+       uint svr;
 
        printf ("Board: CDS Version 0x%02x, PCI Slot %d\n",
                get_board_version (), pci_slot);
@@ -73,12 +72,16 @@ int checkboard (void)
         */
        local_bus_init ();
 
+       svr = get_svr();
+
        /*
         * Fix CPU2 errata: A core hang possible while executing a
         * msync instruction and a snoopable transaction from an I/O
         * master tagged to make quick forward progress is present.
+        * Fixed in Silicon Rev.2.1
         */
-       ecm->eebpcr |= (1 << 16);
+       if (!(SVR_MAJ(svr) >= 2 && SVR_MIN(svr) >= 1))
+               ecm->eebpcr |= (1 << 16);
 
        /*
         * Hack TSEC 3 and 4 IO voltages.