]> git.sur5r.net Git - u-boot/blobdiff - board/freescale/mpc8568mds/mpc8568mds.c
85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards
[u-boot] / board / freescale / mpc8568mds / mpc8568mds.c
index eab1900e5c58858ee4c8b68d6da29c307b6ee245..915fae7fa401377b36142c06c10abd685c45765e 100644 (file)
@@ -99,11 +99,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
        {0,  0, 0, 0, QE_IOP_TAB_END}, /* END of table */
 };
 
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
 void local_bus_init(void);
 void sdram_init(void);
 
@@ -170,13 +165,6 @@ initdram(int board_type)
        dram_size = setup_ddr_tlbs(dram_size / 0x100000);
        dram_size *= 0x100000;
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-       /*
-        * Initialize and enable DDR ECC.
-        */
-       ddr_enable_ecc(dram_size);
-#endif
-
        /*
         * SDRAM Initialization
         */
@@ -200,7 +188,7 @@ local_bus_init(void)
        sys_info_t sysinfo;
 
        get_sys_info(&sysinfo);
-       clkdiv = (lbc->lcrr & 0x0f) * 2;
+       clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2;
        lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
 
        gur->lbiuiplldcr1 = 0x00078080;
@@ -323,6 +311,9 @@ static struct pci_controller pci1_hose = {
 static struct pci_controller pcie1_hose;
 #endif  /* CONFIG_PCIE1 */
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 int first_free_busno = 0;
 
 /*
@@ -380,8 +371,8 @@ pci_init_board(void)
        pib_init();
 
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci1_hose;
+       struct pci_region *r = hose->regions;
 
        uint pci_32 = 1;      /* PORDEVSR[15] */
        uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;       /* PORDEVSR[14] */
@@ -402,27 +393,23 @@ pci_init_board(void)
                        );
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                               CONFIG_SYS_PCI_MEMORY_BUS,
-                               CONFIG_SYS_PCI_MEMORY_PHYS,
-                               CONFIG_SYS_PCI_MEMORY_SIZE,
-                               PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
-                               CONFIG_SYS_PCI1_MEM_BASE,
+               pci_set_region(r++,
+                               CONFIG_SYS_PCI1_MEM_BUS,
                                CONFIG_SYS_PCI1_MEM_PHYS,
                                CONFIG_SYS_PCI1_MEM_SIZE,
                                PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
-                               CONFIG_SYS_PCI1_IO_BASE,
+               pci_set_region(r++,
+                               CONFIG_SYS_PCI1_IO_BUS,
                                CONFIG_SYS_PCI1_IO_PHYS,
                                CONFIG_SYS_PCI1_IO_SIZE,
                                PCI_REGION_IO);
 
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                hose->first_busno = first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -441,9 +428,9 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep =  (host_agent == 0) || (host_agent == 2 ) || (host_agent == 3);
+       struct pci_region *r = hose->regions;
 
        int pcie_configured  = io_sel >= 1;
 
@@ -459,27 +446,23 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                               CONFIG_SYS_PCI_MEMORY_BUS,
-                               CONFIG_SYS_PCI_MEMORY_PHYS,
-                               CONFIG_SYS_PCI_MEMORY_SIZE,
-                               PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
-                               CONFIG_SYS_PCIE1_MEM_BASE,
+               pci_set_region(r++,
+                               CONFIG_SYS_PCIE1_MEM_BUS,
                                CONFIG_SYS_PCIE1_MEM_PHYS,
                                CONFIG_SYS_PCIE1_MEM_SIZE,
                                PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
-                               CONFIG_SYS_PCIE1_IO_BASE,
+               pci_set_region(r++,
+                               CONFIG_SYS_PCIE1_IO_BUS,
                                CONFIG_SYS_PCIE1_IO_PHYS,
                                CONFIG_SYS_PCIE1_IO_SIZE,
                                PCI_REGION_IO);
 
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -500,31 +483,18 @@ pci_init_board(void)
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_board_setup(void *blob, bd_t *bd)
-{
-       int node, tmp[2];
-       const char *path;
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                       struct pci_controller *hose);
 
+void ft_board_setup(void *blob, bd_t *bd)
+{
        ft_cpu_setup(blob, bd);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
 #ifdef CONFIG_PCI1
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
 #endif
 #ifdef CONFIG_PCIE1
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
 #endif
-       }
 }
 #endif