Merge branch 'master' of git://git.denx.de/u-boot-mips

[u-boot] / board / freescale / mx35pdk / mx35pdk.h

diff --git a/board/freescale/mx35pdk/mx35pdk.h b/board/freescale/mx35pdk/mx35pdk.h
index 6aeb21835b1e1055d37ac9b6e871dbd2ad2a2a3c..f552a1dd14f45f6dcff970f19406ee572a704564 100644 (file)
--- a/board/freescale/mx35pdk/mx35pdk.h
+++ b/board/freescale/mx35pdk/mx35pdk.h
@@ -4,53 +4,12 @@
  *
  * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __BOARD_MX35_3STACK_H
 #define __BOARD_MX35_3STACK_H
 
-#define AIPS_MPR_CONFIG                0x77777777
-#define AIPS_OPACR_CONFIG      0x00000000
-
-/* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */
-#define MAX_MPR_CONFIG         0x00302154
-/* SGPCR - always park on last master */
-#define MAX_SGPCR_CONFIG       0x00000010
-/* MGPCR - restore default values */
-#define MAX_MGPCR_CONFIG       0x00000000
-
-/*
- * M3IF Control Register (M3IFCTL)
- * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000
- * MRRP[1] = L2CC1 not on priority list (0 << 0) = 0x00000000
- * MRRP[2] = MBX not on priority list (0 << 0)   = 0x00000000
- * MRRP[3] = MAX1 not on priority list (0 << 0)  = 0x00000000
- * MRRP[4] = SDMA not on priority list (0 << 0)  = 0x00000000
- * MRRP[5] = MPEG4 not on priority list (0 << 0) = 0x00000000
- * MRRP[6] = IPU1 on priority list (1 << 6)      = 0x00000040
- * MRRP[7] = IPU2 not on priority list (0 << 0)  = 0x00000000
- *                                               ------------
- *                                                 0x00000040
- */
-#define M3IF_CONFIG    0x00000040
-
 #define DBG_BASE_ADDR          WEIM_CTRL_CS5
 #define DBG_CSCR_U_CONFIG      0x0000D843
 #define DBG_CSCR_L_CONFIG      0x22252521