mx7dsabresd: Print secure/non-secure mode info

[u-boot] / board / freescale / mx7dsabresd / mx7dsabresd.c

diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index f8ae9733fc0ba5521bae4a461f31ca488feb673c..3098e1a3dd80ca2c7465a75135affbe3ebc0d4f4 100644 (file)
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -23,7 +23,8 @@
 #include <i2c.h>
 #include <asm/imx-common/mxc_i2c.h>
 #include <asm/arch/crm_regs.h>
-#include <usb/ehci-fsl.h>
+#include <usb.h>
+#include <usb/ehci-ci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -47,6 +48,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define QSPI_PAD_CTRL  \
        (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
 
+#define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
+
+#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM)
 #ifdef CONFIG_SYS_I2C_MXC
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 /* I2C1 for PMIC */
@@ -108,6 +112,14 @@ static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
        MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 };
 
+static iomux_v3_cfg_t const usb_otg1_pads[] = {
+       MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const usb_otg2_pads[] = {
+       MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
 #define IOX_SDI IMX_GPIO_NR(1, 9)
 #define IOX_STCP IMX_GPIO_NR(1, 12)
 #define IOX_SHCP IMX_GPIO_NR(1, 13)
@@ -159,7 +171,7 @@ static enum qn_level seq[3][2] = {
 
 static enum qn_func qn_output[8] = {
        qn_disable, qn_reset, qn_reset, qn_reset, qn_reset, qn_reset, qn_enable,
-       qn_enable
+       qn_disable
 };
 
 static void iox74lv_init(void)
@@ -196,6 +208,38 @@ static void iox74lv_init(void)
        gpio_direction_output(IOX_STCP, 1);
 };
 
+#ifdef CONFIG_NAND_MXS
+static iomux_v3_cfg_t const gpmi_pads[] = {
+       MX7D_PAD_SD3_DATA0__NAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_DATA1__NAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_DATA2__NAND_DATA02 | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_DATA3__NAND_DATA03 | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_DATA4__NAND_DATA04 | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_DATA5__NAND_DATA05 | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_DATA6__NAND_DATA06 | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_DATA7__NAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_CLK__NAND_CLE      | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_CMD__NAND_ALE      | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_STROBE__NAND_RE_B  | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SD3_RESET_B__NAND_WE_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SAI1_MCLK__NAND_WP_B   | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SAI1_RX_BCLK__NAND_CE3_B       | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SAI1_RX_SYNC__NAND_CE2_B       | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B       | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B       | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SAI1_TX_SYNC__NAND_DQS | MUX_PAD_CTRL(NAND_PAD_CTRL),
+       MX7D_PAD_SAI1_TX_DATA__NAND_READY_B     | MUX_PAD_CTRL(NAND_PAD_READY0_CTRL),
+};
+
+static void setup_gpmi_nand(void)
+{
+       imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads));
+
+       /* NAND_USDHC_BUS_CLK is set in rom */
+       set_clk_nand();
+}
+#endif
+
 #ifdef CONFIG_VIDEO_MXS
 static iomux_v3_cfg_t const lcd_pads[] = {
        MX7D_PAD_LCD_CLK__LCD_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
@@ -293,22 +337,12 @@ static struct fsl_esdhc_cfg usdhc_cfg[3] = {
        {USDHC3_BASE_ADDR},
 };
 
-static int mmc_get_env_devno(void)
+int board_mmc_get_env_dev(int devno)
 {
-       struct bootrom_sw_info **p =
-               (struct bootrom_sw_info **)ROM_SW_INFO_ADDR;
-
-       u8 boot_type = (*p)->boot_dev_type;
-       u8 dev_no = (*p)->boot_dev_instance;
-
-       /* If not boot from sd/mmc, use default value */
-       if ((boot_type != BOOT_TYPE_SD) && (boot_type != BOOT_TYPE_MMC))
-               return CONFIG_SYS_MMC_ENV_DEV;
+       if (devno == 2)
+               devno--;
 
-       if (dev_no == 2)
-               dev_no--;
-
-       return dev_no;
+       return devno;
 }
 
 static int mmc_map_to_kernel_blk(int dev_no)
@@ -341,7 +375,7 @@ int board_mmc_init(bd_t *bis)
        int i, ret;
        /*
         * According to the board_mmc_init() the following map is done:
-        * (U-boot device node)    (Physical Port)
+        * (U-Boot device node)    (Physical Port)
         * mmc0                    USDHC1
         * mmc2                    USDHC3 (eMMC)
         */
@@ -397,7 +431,7 @@ static void mmc_late_init(void)
 {
        char cmd[32];
        char mmcblk[32];
-       u32 dev_no = mmc_get_env_devno();
+       u32 dev_no = mmc_get_env_dev();
 
        if (!check_mmc_autodetect())
                return;
@@ -486,6 +520,10 @@ int board_early_init_f(void)
        setup_iomux_uart();
 
        setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+       imx_iomux_v3_setup_multiple_pads(usb_otg1_pads,
+                                        ARRAY_SIZE(usb_otg1_pads));
+       imx_iomux_v3_setup_multiple_pads(usb_otg2_pads,
+                                        ARRAY_SIZE(usb_otg2_pads));
 
        return 0;
 }
@@ -503,6 +541,10 @@ int board_init(void)
        setup_fec();
 #endif
 
+#ifdef CONFIG_NAND_MXS
+       setup_gpmi_nand();
+#endif
+
 #ifdef CONFIG_VIDEO_MXS
        setup_lcd();
 #endif
@@ -567,35 +609,24 @@ int board_late_init(void)
 
 int checkboard(void)
 {
-       puts("Board: i.MX7D SABRESD\n");
+       char *mode;
+
+       if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
+               mode = "secure";
+       else
+               mode = "non-secure";
+
+       printf("Board: i.MX7D SABRESD in %s mode\n", mode);
 
        return 0;
 }
 
 #ifdef CONFIG_USB_EHCI_MX7
-static iomux_v3_cfg_t const usb_otg1_pads[] = {
-       MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usb_otg2_pads[] = {
-       MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-int board_ehci_hcd_init(int port)
+int board_usb_phy_mode(int port)
 {
-       switch (port) {
-       case 0:
-               imx_iomux_v3_setup_multiple_pads(usb_otg1_pads,
-                                                ARRAY_SIZE(usb_otg1_pads));
-               break;
-       case 1:
-               imx_iomux_v3_setup_multiple_pads(usb_otg2_pads,
-                                                ARRAY_SIZE(usb_otg2_pads));
-               break;
-       default:
-               printf("MXC USB port %d not yet supported\n", port);
-               return -EINVAL;
-       }
-       return 0;
+       if (port == 0)
+               return USB_INIT_DEVICE;
+       else
+               return USB_INIT_HOST;
 }
 #endif