pbl: use "wait" command instead of "flush" command

[u-boot] / board / freescale / t102xrdb / ddr.c

diff --git a/board/freescale/t102xrdb/ddr.c b/board/freescale/t102xrdb/ddr.c
index adf9fd5f78b448cb010cb2a5493abe9b347570f4..edfbdbf3a814e65b1fe3fd246b51f2fa38c9f5fd 100644 (file)
--- a/board/freescale/t102xrdb/ddr.c
+++ b/board/freescale/t102xrdb/ddr.c
@@ -34,12 +34,12 @@ static const struct board_specific_parameters udimm0[] = {
         *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl |
         * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |
         */
-       {2,  833,   0,  4,  6,  0x06060607,  0x08080807,},
-       {2,  1350,  0,  4,  7,  0x0708080A,  0x0A0B0C09,},
-       {2,  1666,  0,  4,  7,  0x0808090B,  0x0C0D0E0A,},
-       {1,  833,   0,  4,  6,  0x06060607,  0x08080807,},
-       {1,  1350,  0,  4,  7,  0x0708080A,  0x0A0B0C09,},
-       {1,  1666,  0,  4,  7,  0x0808090B,  0x0C0D0E0A,},
+       {2,  833,   0,  8,  6,  0x06060607,  0x08080807,},
+       {2,  1350,  0,  8,  7,  0x0708080A,  0x0A0B0C09,},
+       {2,  1666,  0,  8,  7,  0x0808090B,  0x0C0D0E0A,},
+       {1,  833,   0,  8,  6,  0x06060607,  0x08080807,},
+       {1,  1350,  0,  8,  7,  0x0708080A,  0x0A0B0C09,},
+       {1,  1666,  0,  8,  7,  0x0808090B,  0x0C0D0E0A,},
        {}
 };
 
@@ -234,12 +234,12 @@ phys_size_t initdram(int board_type)
        puts("Initializing....using SPD\n");
 #endif
        dram_size = fsl_ddr_sdram();
-       dram_size = setup_ddr_tlbs(dram_size / 0x100000);
-       dram_size *= 0x100000;
 #else
        /* DDR has been initialised by first stage boot loader */
        dram_size =  fsl_ddr_sdram_size();
 #endif
+       dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+       dram_size *= 0x100000;
 
 #if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
        fsl_dp_resume();