Merge branch 'master' of git://git.denx.de/u-boot-video

[u-boot] / board / freescale / t1040qds / t1040qds.c

diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c
index 5abb18a2603aec81a333508d604b2433672203b3..d7d56b47c816115b2a21c9ac859dc2ed2776816c 100644 (file)
--- a/board/freescale/t1040qds/t1040qds.c
+++ b/board/freescale/t1040qds/t1040qds.c
@@ -15,10 +15,11 @@
 #include <asm/immap_85xx.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
-#include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
+#include <hwconfig.h>
 
+#include "../common/sleep.h"
 #include "../common/qixis.h"
 #include "t1040qds.h"
 #include "t1040qds_qixis.h"
@@ -89,11 +90,45 @@ int select_i2c_ch_pca9547(u8 ch)
        return 0;
 }
 
+static void qe_board_setup(void)
+{
+       u8 brdcfg15, brdcfg9;
+
+       if (hwconfig("qe") && hwconfig("tdm")) {
+               brdcfg15 = QIXIS_READ(brdcfg[15]);
+               /*
+                * TDMRiser uses QE-TDM
+                * Route QE_TDM signals to TDM Riser slot
+                */
+               QIXIS_WRITE(brdcfg[15], brdcfg15 | 7);
+       } else if (hwconfig("qe") && hwconfig("uart")) {
+               brdcfg15 = QIXIS_READ(brdcfg[15]);
+               brdcfg9 = QIXIS_READ(brdcfg[9]);
+               /*
+                * Route QE_TDM signals to UCC
+                * ProfiBus controlled by UCC3
+                */
+               brdcfg15 &= 0xfc;
+               QIXIS_WRITE(brdcfg[15], brdcfg15 | 2);
+               QIXIS_WRITE(brdcfg[9], brdcfg9 | 4);
+       }
+}
+
+int board_early_init_f(void)
+{
+#if defined(CONFIG_DEEP_SLEEP)
+       if (is_warm_boot())
+               fsl_dp_disable_console();
+#endif
+
+       return 0;
+}
+
 int board_early_init_r(void)
 {
 #ifdef CONFIG_SYS_FLASH_BASE
        const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
-       const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+       int flash_esel = find_tlb_idx((void *)flashbase, 1);
 
        /*
         * Remap Boot flash + PROMJET region to caching-inhibited
@@ -104,16 +139,18 @@ int board_early_init_r(void)
        flush_dcache();
        invalidate_icache();
 
-       /* invalidate existing TLB entry for flash + promjet */
-       disable_tlb(flash_esel);
+       if (flash_esel == -1) {
+               /* very unlikely unless something is messed up */
+               puts("Error: Could not find TLB for FLASH BASE\n");
+               flash_esel = 2; /* give our best effort to continue */
+       } else {
+               /* invalidate existing TLB entry for flash + promjet */
+               disable_tlb(flash_esel);
+       }
 
        set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
                MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                0, flash_esel, BOOKE_PAGESZ_256M, 1);
-#endif
-       set_liodns();
-#ifdef CONFIG_SYS_DPAA_QBMAN
-       setup_portals();
 #endif
        select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
 
@@ -160,20 +197,6 @@ unsigned long get_board_ddr_clk(void)
        return 66666666;
 }
 
-static const char *serdes_clock_to_string(u32 clock)
-{
-       switch (clock) {
-       case SRDS_PLLCR0_RFCK_SEL_100:
-               return "100";
-       case SRDS_PLLCR0_RFCK_SEL_125:
-               return "125";
-       case SRDS_PLLCR0_RFCK_SEL_156_25:
-               return "156.25";
-       default:
-               return "Unknown frequency";
-       }
-}
-
 #define NUM_SRDS_BANKS 2
 int misc_init_r(void)
 {
@@ -210,10 +233,12 @@ int misc_init_r(void)
                }
        }
 
+       qe_board_setup();
+
        return 0;
 }
 
-void ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, bd_t *bd)
 {
        phys_addr_t base;
        phys_size_t size;
@@ -237,7 +262,10 @@ void ft_board_setup(void *blob, bd_t *bd)
 
 #ifdef CONFIG_SYS_DPAA_FMAN
        fdt_fixup_fman_ethernet(blob);
+       fdt_fixup_board_enet(blob);
 #endif
+
+       return 0;
 }
 
 void qixis_dump_switch(void)
@@ -253,3 +281,8 @@ void qixis_dump_switch(void)
                printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1]));
        }
 }
+
+int board_need_mem_reset(void)
+{
+       return 1;
+}