board: ls2080a: Add "mcinitcmd" env for MC & DPL deployment

[u-boot] / board / freescale / t208xrdb / t208xrdb.c

diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index ad393dfc5c250ddc71999997596886ab8356443f..0cb05aa03f0788cac40011c16ed761bac18fd8da 100644 (file)
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -14,7 +14,6 @@
 #include <asm/immap_85xx.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
-#include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
 #include "t208xrdb.h"
@@ -81,11 +80,6 @@ int board_early_init_r(void)
                MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                0, flash_esel, BOOKE_PAGESZ_256M, 1);
 
-       set_liodns();
-#ifdef CONFIG_SYS_DPAA_QBMAN
-       setup_portals();
-#endif
-
        /*
         * Adjust core voltage according to voltage ID
         * This function changes I2C mux to channel 2.
@@ -107,6 +101,13 @@ unsigned long get_board_ddr_clk(void)
 
 int misc_init_r(void)
 {
+       u8 reg;
+
+       /* Reset CS4315 PHY */
+       reg = CPLD_READ(reset_ctl);
+       reg |= CPLD_RSTCON_EDC_RST;
+       CPLD_WRITE(reset_ctl, reg);
+
        return 0;
 }