]> git.sur5r.net Git - u-boot/blobdiff - board/gateworks/gw_ventana/gw_ventana_spl.c
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
[u-boot] / board / gateworks / gw_ventana / gw_ventana_spl.c
index 9524da7daf392166f55b9d7f5b49d526e858ccb9..ee93e545ded20449c1e79cc3974d0fd6fa14b647 100644 (file)
@@ -21,8 +21,6 @@
 #include "gsc.h"
 #include "common.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #define RTT_NOM_120OHM /* use 120ohm Rtt_nom vs 60ohm (lower power) */
 #define GSC_EEPROM_DDR_SIZE    0x2B    /* enum (512,1024,2048) MB */
 #define GSC_EEPROM_DDR_WIDTH   0x2D    /* enum (32,64) bit */
@@ -583,17 +581,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 /*
  * called from C runtime startup code (arch/arm/lib/crt0.S:_main)
  * - we have a stack and a place to store GD, both in SRAM
@@ -637,9 +624,6 @@ void board_init_f(ulong dummy)
        spl_dram_init(8 << ventana_info.sdram_width,
                      16 << ventana_info.sdram_size,
                      board_model);
-
-       /* Clear the BSS. */
-       memset(__bss_start, 0, __bss_end - __bss_start);
 }
 
 void board_boot_order(u32 *spl_boot_list)