int get_fpga_state(unsigned dev)
{
- return gd->fpga_state[dev];
+ return gd->arch.fpga_state[dev];
}
void print_fpga_state(unsigned dev)
{
- if (gd->fpga_state[dev] & FPGA_STATE_DONE_FAILED)
+ if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
puts(" Waiting for FPGA-DONE timed out.\n");
- if (gd->fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
+ if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
puts(" FPGA reflection test failed.\n");
}
unsigned ctr;
for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
- gd->fpga_state[k] = 0;
+ gd->arch.fpga_state[k] = 0;
/*
* reset FPGA
while (!gd405ex_get_fpga_done(k)) {
udelay(100000);
if (ctr++ > 5) {
- gd->fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+ gd->arch.fpga_state[k] |=
+ FPGA_STATE_DONE_FAILED;
break;
}
}
udelay(100000);
if (ctr++ > 5) {
- gd->fpga_state[k] |=
+ gd->arch.fpga_state[k] |=
FPGA_STATE_REFLECTION_FAILED;
break;
}