ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specific

[u-boot] / board / gdsys / dlvision / dlvision.c

diff --git a/board/gdsys/dlvision/dlvision.c b/board/gdsys/dlvision/dlvision.c
index 4ec1cdbc3e2d63f55c4a268a220981dfcdd93552..3499bdc685fe54e2a3131af469d09dbe43f1285e 100644 (file)
--- a/board/gdsys/dlvision/dlvision.c
+++ b/board/gdsys/dlvision/dlvision.c
@@ -25,7 +25,7 @@
 #include <command.h>
 #include <asm/processor.h>
 #include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
 
 enum {
        HWTYPE_DLVISION_CPU = 0,
@@ -36,19 +36,19 @@ enum {
 
 int board_early_init_f(void)
 {
-       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
-       mtdcr(uicer, 0x00000000);       /* disable all ints */
-       mtdcr(uiccr, 0x00000000);       /* set all to be non-critical */
-       mtdcr(uicpr, 0xFFFFFF80);       /* set int polarities */
-       mtdcr(uictr, 0x10000000);       /* set int trigger levels */
-       mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest prio */
-       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+       mtdcr(UIC0SR, 0xFFFFFFFF);      /* clear all ints */
+       mtdcr(UIC0ER, 0x00000000);      /* disable all ints */
+       mtdcr(UIC0CR, 0x00000000);      /* set all to be non-critical */
+       mtdcr(UIC0PR, 0xFFFFFF80);      /* set int polarities */
+       mtdcr(UIC0TR, 0x10000000);      /* set int trigger levels */
+       mtdcr(UIC0VCR, 0x00000001);     /* set vect base=0,INT0 highest prio */
+       mtdcr(UIC0SR, 0xFFFFFFFF);      /* clear all ints */
 
        /*
         * EBC Configuration Register: set ready timeout to 512 ebc-clks
         * -> ca. 15 us
         */
-       mtebc(epcr, 0xa8400000);        /* ebc always driven */
+       mtebc(EBC0_CFG, 0xa8400000);    /* ebc always driven */
 
        /*
         * setup io-latches