u32 versions; /* 0x0004 */
u32 fpga_version; /* 0x0008 */
u32 fpga_features; /* 0x000c */
+ u32 reserved[4]; /* 0x0010 */
+ u32 control; /* 0x0020 */
};
#ifndef CONFIG_TRAILBLAZER
#ifdef CONFIG_TRAILBLAZER
int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- int rcode = 0;
-
- if (run_command(getenv("bootcmd"), flag) < 0)
- rcode = 1;
- return rcode;
+ return run_command(env_get("bootcmd"), flag);
}
int board_early_init_r(void)
}
#ifdef CONFIG_OF_BOARD_SETUP
-void ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, bd_t *bd)
{
phys_addr_t base;
phys_size_t size;
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
FT_FSL_PCI_SETUP;
+
+ return 0;
}
#endif
fpga = pci_map_bar(devno, PCI_BASE_ADDRESS_0,
PCI_REGION_MEM);
- versions = readl(fpga->versions);
- fpga_version = readl(fpga->fpga_version);
- fpga_features = readl(fpga->fpga_features);
+ /* disable sideband clocks */
+ writel(1, &fpga->control);
+
+ versions = readl(&fpga->versions);
+ fpga_version = readl(&fpga->fpga_version);
+ fpga_features = readl(&fpga->fpga_features);
hardware_version = versions & 0xf;
feature_uart_channels = (fpga_features >> 6) & 0x1f;