FSL DDR: Convert MPC8560ADS to new DDR code.

[u-boot] / board / hymod / bsp.c

diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c
index 02b6421b89e68cefdb4907ae46fd1c8cf5811a76..12f14020172f3b03c58654585c6388719656920c 100644 (file)
--- a/board/hymod/bsp.c
+++ b/board/hymod/bsp.c
@@ -27,13 +27,14 @@
 #include <command.h>
 #include <net.h>
 #include <asm/iopin_8260.h>
-#include <cmd_bsp.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /*-----------------------------------------------------------------------
  * Board Special Commands: FPGA load/store, EEPROM erase
  */
 
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
 
 #define LOAD_SUCCESS           0
 #define LOAD_FAIL_NOCONF       1
@@ -76,8 +77,6 @@
 int
 fpga_load (int mezz, uchar *addr, ulong size)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
        xlx_info_t *fp;
        xlx_iopins_t *fpgaio;
@@ -276,7 +275,30 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
        printf ("Usage:\n%s\n", cmdtp->usage);
        return 1;
 }
-
+U_BOOT_CMD(
+       fpga,   6,      1,      do_fpga,
+       "fpga    - FPGA sub-system\n",
+       "load [type] addr size\n"
+       "  - write the configuration data at memory address `addr',\n"
+       "    size `size' bytes, into the FPGA of type `type' (either\n"
+       "    `main' or `mezz', default `main'). e.g.\n"
+       "        `fpga load 100000 7d8f'\n"
+       "    loads the main FPGA with config data at address 100000\n"
+       "    HEX, size 7d8f HEX (32143 DEC) bytes\n"
+       "fpga tftp file addr\n"
+       "  - transfers `file' from the tftp server into memory at\n"
+       "    address `addr', then writes the entire file contents\n"
+       "    into the main FPGA\n"
+       "fpga store addr\n"
+       "  - read configuration data from the main FPGA (the mezz\n"
+       "    FPGA is write-only), into address `addr'. There must be\n"
+       "    enough memory available at `addr' to hold all the config\n"
+       "    data - the size of which is determined by VC:???\n"
+       "fpga info\n"
+       "  - print information about the Hymod FPGA, namely the\n"
+       "    memory addresses at which the four FPGA local bus\n"
+       "    address spaces appear in the physical address space\n"
+);
 /* ------------------------------------------------------------------------- */
 int
 do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
@@ -312,15 +334,17 @@ do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 
        return 0;
 }
+U_BOOT_CMD(
+       eeclear,        1,      0,      do_eecl,
+       "eeclear - Clear the eeprom on a Hymod board \n",
+       "[type]\n"
+       "  - write zeroes into the EEPROM on the board of type `type'\n"
+       "    (`type' is either `main' or `mezz' - default `main')\n"
+       "    Note: the EEPROM write enable jumper must be installed\n"
+);
 
 /* ------------------------------------------------------------------------- */
 
-#if 0
-static uchar test_bitfile[] = {
-       /* one day ... */
-};
-#endif
-
 int
 do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
@@ -378,6 +402,4 @@ do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
        return 0;
 }
 
-#endif /* CFG_CMD_BSP */
-
-/* ------------------------------------------------------------------------- */
+#endif