malta: setup PIIX4 interrupt route

[u-boot] / board / imgtec / malta / malta.c

diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c
index 2af00672daa0dbe676ad1cc09c58eb1e1f72e122..a1a4c0186606656a4bf52fe8fe205c42306d93f3 100644 (file)
--- a/board/imgtec/malta/malta.c
+++ b/board/imgtec/malta/malta.c
@@ -7,8 +7,10 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <pci.h>
 #include <pci_gt64120.h>
 #include <pci_msc01.h>
+#include <rtc.h>
 #include <serial.h>
 
 #include <asm/addrspace.h>
@@ -29,6 +31,24 @@ enum sys_con {
        SYSCON_MSC01,
 };
 
+static void malta_lcd_puts(const char *str)
+{
+       int i;
+       void *reg = (void *)CKSEG1ADDR(MALTA_ASCIIPOS0);
+
+       /* print up to 8 characters of the string */
+       for (i = 0; i < min(strlen(str), 8); i++) {
+               __raw_writel(str[i], reg);
+               reg += MALTA_ASCIIPOS1 - MALTA_ASCIIPOS0;
+       }
+
+       /* fill the rest of the display with spaces */
+       for (; i < 8; i++) {
+               __raw_writel(' ', reg);
+               reg += MALTA_ASCIIPOS1 - MALTA_ASCIIPOS0;
+       }
+}
+
 static enum core_card malta_core_card(void)
 {
        u32 corid, rev;
@@ -71,6 +91,7 @@ int checkboard(void)
 {
        enum core_card core;
 
+       malta_lcd_puts("U-boot");
        puts("Board: MIPS Malta");
 
        core = malta_core_card();
@@ -128,6 +149,13 @@ int board_early_init_f(void)
        return 0;
 }
 
+int misc_init_r(void)
+{
+       rtc_reset();
+
+       return 0;
+}
+
 struct serial_device *default_serial_console(void)
 {
        switch (malta_sys_con()) {
@@ -142,6 +170,8 @@ struct serial_device *default_serial_console(void)
 
 void pci_init_board(void)
 {
+       pci_dev_t bdf;
+
        switch (malta_sys_con()) {
        case SYSCON_GT64120:
                set_io_port_base(CKSEG1ADDR(MALTA_GT_PCIIO_BASE));
@@ -164,4 +194,15 @@ void pci_init_board(void)
                               0x00000000, MALTA_MSC01_PCIIO_SIZE);
                break;
        }
+
+       bdf = pci_find_device(PCI_VENDOR_ID_INTEL,
+                             PCI_DEVICE_ID_INTEL_82371AB_0, 0);
+       if (bdf == -1)
+               panic("Failed to find PIIX4 PCI bridge\n");
+
+       /* setup PCI interrupt routing */
+       pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCA, 10);
+       pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCB, 10);
+       pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCC, 11);
+       pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCD, 11);
 }