inka4x0: Add hardware diagnosis and RTC in configuration.

[u-boot] / board / inka4x0 / inka4x0.c

diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c
index d670cc35a003e0790ae566eb7e3fc0ede7faf76f..a8bc3b309c3cd581ecd5be38b14b4636205ad4b7 100644 (file)
--- a/board/inka4x0/inka4x0.c
+++ b/board/inka4x0/inka4x0.c
@@ -1,6 +1,9 @@
 /*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * (C) Copyright 2008-2009
+ * Andreas Pfefferle, DENX Software Engineering, ap@denx.de.
+ *
+ * (C) Copyright 2009
+ * Detlev Zundel, DENX Software Engineering, dzu@denx.de.
  *
  * (C) Copyright 2004
  * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
@@ -8,6 +11,9 @@
  * (C) Copyright 2004
  * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
  *
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -27,17 +33,26 @@
  * MA 02111-1307 USA
  */
 
+#include <asm/io.h>
 #include <common.h>
 #include <mpc5xxx.h>
 #include <pci.h>
 
-#if defined(CONFIG_MPC5200_DDR)
+#if defined(CONFIG_DDR_MT46V16M16)
 #include "mt46v16m16-75.h"
-#else
+#elif defined(CONFIG_SDR_MT48LC16M16A2)
 #include "mt48lc16m16a2-75.h"
+#elif defined(CONFIG_DDR_MT46V32M16)
+#include "mt46v32m16.h"
+#elif defined(CONFIG_DDR_HYB25D512160BF)
+#include "hyb25d512160bf.h"
+#elif defined(CONFIG_DDR_K4H511638C)
+#include "k4h511638c.h"
+#else
+#error "INKA4x0 SDRAM: invalid chip type specified!"
 #endif
 
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
 static void sdram_start (int hi_addr)
 {
        long hi_addr_bit = hi_addr ? 0x01000000 : 0;
@@ -80,15 +95,15 @@ static void sdram_start (int hi_addr)
 
 /*
  * ATTENTION: Although partially referenced initdram does NOT make real use
- *           use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
+ *           use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
  *           is something else than 0x00000000.
  */
 
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
        ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
-       ulong test1, test2;
+#ifndef CONFIG_SYS_RAMBOOT
+       long test1, test2;
 
        /* setup SDRAM chip selects */
        *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
@@ -108,9 +123,9 @@ long int initdram (int board_type)
 
        /* find RAM size using SDRAM CS0 only */
        sdram_start(0);
-       test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000);
+       test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
        sdram_start(1);
-       test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000);
+       test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
        if (test1 > test2) {
                sdram_start(0);
                dramsize = test1;
@@ -132,7 +147,7 @@ long int initdram (int board_type)
        }
 
        *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
-#else /* CFG_RAMBOOT */
+#else /* CONFIG_SYS_RAMBOOT */
 
        /* retrieve size of memory connected to SDRAM CS0 */
        dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
@@ -141,18 +156,8 @@ long int initdram (int board_type)
        } else {
                dramsize = 0;
        }
+#endif /* CONFIG_SYS_RAMBOOT */
 
-       /* retrieve size of memory connected to SDRAM CS1 */
-       dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
-       if (dramsize2 >= 0x13) {
-               dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
-       } else {
-               dramsize2 = 0;
-       }
-
-#endif /* CFG_RAMBOOT */
-
-/*     return dramsize + dramsize2; */
        return dramsize;
 }
 
@@ -173,15 +178,27 @@ void flash_preinit(void)
        *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 }
 
+int misc_init_r (void) {
+       extern int inkadiag_init_r (void);
+
+       /*
+        * The command table used for the subcommands of inkadiag
+        * needs to be relocated manually.
+        */
+       return inkadiag_init_r();
+}
+
 int misc_init_f (void)
 {
-       uchar tmp[10];
+       struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+       struct mpc5xxx_wu_gpio *wu_gpio = (struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO;
+       char tmp[10];
        int i, br;
 
        i = getenv_r("brightness", tmp, sizeof(tmp));
        br = (i > 0)
                ? (int) simple_strtoul (tmp, NULL, 10)
-               : CFG_BRIGHTNESS;
+               : CONFIG_SYS_BRIGHTNESS;
        if (br > 255)
                br = 255;
 
@@ -222,6 +239,23 @@ int misc_init_f (void)
        *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC3_9;
        *(vu_long *) MPC5XXX_WU_GPIO_DIR    |= GPIO_PSC3_9;
        *(vu_long *) MPC5XXX_WU_GPIO_DATA_O   |= GPIO_PSC3_9;
+
+       /*
+        * Configure three wire serial interface to RTC (PSC1_4,
+        * PSC2_4, PSC3_4, PSC3_5)
+        */
+       setbits_8(&wu_gpio->enable,  MPC5XXX_GPIO_WKUP_PSC1_4 |
+                                    MPC5XXX_GPIO_WKUP_PSC2_4);
+       setbits_8(&wu_gpio->ddr,     MPC5XXX_GPIO_WKUP_PSC1_4 |
+                                    MPC5XXX_GPIO_WKUP_PSC2_4);
+       clrbits_8(&wu_gpio->dvo,     MPC5XXX_GPIO_WKUP_PSC1_4);
+       clrbits_8(&gpio->sint_inten, MPC5XXX_GPIO_SINT_PSC3_4 |
+                                    MPC5XXX_GPIO_SINT_PSC3_5);
+       setbits_8(&gpio->sint_gpioe, MPC5XXX_GPIO_SINT_PSC3_4 |
+                                    MPC5XXX_GPIO_SINT_PSC3_5);
+       setbits_8(&gpio->sint_ddr,   MPC5XXX_GPIO_SINT_PSC3_5);
+       clrbits_8(&gpio->sint_dvo,   MPC5XXX_GPIO_SINT_PSC3_5);
+
        return 0;
 }
 
@@ -236,7 +270,7 @@ void pci_init_board(void)
 }
 #endif
 
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
 
 void init_ide_reset (void)
 {
@@ -261,4 +295,4 @@ void ide_set_reset (int idereset)
                *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |=  GPIO_PSC1_4;
        }
 }
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif