*/
#include <common.h>
-#include <ppc4xx.h>
+#include <asm/ppc4xx.h>
#include <asm/processor.h>
-#if CFG_MAX_FLASH_BANKS != 1
-#error "CFG_MAX_FLASH_BANKS must be 1"
+#if CONFIG_SYS_MAX_FLASH_BANKS != 1
+#error "CONFIG_SYS_MAX_FLASH_BANKS must be 1"
#endif
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Functions
last = start;
while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
(FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return -1;
}
{
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
+ int flag, prot, sect;
int i;
if ((s_first < 0) || (s_first > s_last)) {
printf ("\n");
}
- l_sect = -1;
-
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
addr2[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
}
- l_sect = sect;
/*
* Wait for each sector to complete, it's more
* reliable. According to AMD Spec, you must
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
-#if 0
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
- wait_for_DQ7 (info, l_sect);
-
-DONE:
-#endif
/* reset to read mode */
addr = (FLASH_WORD_SIZE *) info->start[0];
addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
(data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}