Tegra: T30: Beaver: Fix board/board_name env vars, s/b beaver, not cardhu

[u-boot] / board / keymile / km_arm / fpga_config.c

diff --git a/board/keymile/km_arm/fpga_config.c b/board/keymile/km_arm/fpga_config.c
index 4356b9a64efccf46d0721a204d0a6aac77d394c6..66a3baf0f71a5b6d79b8f16232a23cee5944806f 100644 (file)
--- a/board/keymile/km_arm/fpga_config.c
+++ b/board/keymile/km_arm/fpga_config.c
@@ -96,12 +96,43 @@ static int boco_set_bits(u8 reg, u8 flags)
 #define SPI_REG                0x06
 #define CFG_EEPROM     0x02
 #define FPGA_PROG      0x04
+#define FPGA_INIT_B    0x10
 #define FPGA_DONE      0x20
 
+static int fpga_done(void)
+{
+       int ret = 0;
+       u8 regval;
+
+       /* this is only supported with the boco2 design */
+       if (!check_boco2())
+               return 0;
+
+       ret = i2c_read(BOCO_ADDR, SPI_REG, 1, &regval, 1);
+       if (ret) {
+               printf("%s: error reading the BOCO @%#x !!\n",
+                       __func__, SPI_REG);
+               return 0;
+       }
+
+       return regval & FPGA_DONE ? 1 : 0;
+}
+
+int skip;
+
 int trigger_fpga_config(void)
 {
        int ret = 0;
 
+       /* if the FPGA is already configured, we do not want to
+        * reconfigure it */
+       skip = 0;
+       if (fpga_done()) {
+               printf("PCIe FPGA config: skipped\n");
+               skip = 1;
+               return 0;
+       }
+
        if (check_boco2()) {
                /* we have a BOCO2, this has to be triggered here */
 
@@ -111,7 +142,7 @@ int trigger_fpga_config(void)
                        return ret;
 
                /* trigger the config start */
-               ret = boco_clear_bits(SPI_REG, FPGA_PROG);
+               ret = boco_clear_bits(SPI_REG, FPGA_PROG | FPGA_INIT_B);
                if (ret)
                        return ret;
 
@@ -123,6 +154,11 @@ int trigger_fpga_config(void)
                if (ret)
                        return ret;
 
+               /* finally, raise INIT_B to remove the config delay */
+               ret = boco_set_bits(SPI_REG, FPGA_INIT_B);
+               if (ret)
+                       return ret;
+
        } else {
                /* we do it the old way, with the gpio pin */
                kw_gpio_set_valid(KM_XLX_PROGRAM_B_PIN, 1);
@@ -141,6 +177,9 @@ int wait_for_fpga_config(void)
        u8 spictrl;
        u32 timeout = 20000;
 
+       if (skip)
+               return 0;
+
        if (!check_boco2()) {
                /* we do not have BOCO2, this is not really used */
                return 0;
@@ -167,25 +206,30 @@ int wait_for_fpga_config(void)
 }
 
 #define PRST1          0x4
-#define BRIDGE_RST     0x4
+#define PCIE_RST       0x10
+#define TRAFFIC_RST    0x04
 
 int fpga_reset(void)
 {
        int ret = 0;
+       u8 resets;
 
        if (!check_boco2()) {
                /* we do not have BOCO2, this is not really used */
                return 0;
        }
 
-       ret = boco_clear_bits(PRST1, BRIDGE_RST);
+       /* if we have skipped, we only want to reset the PCIe part */
+       resets = skip ? PCIE_RST : PCIE_RST | TRAFFIC_RST;
+
+       ret = boco_clear_bits(PRST1, resets);
        if (ret)
                return ret;
 
        /* small delay for the pulse */
        udelay(10);
 
-       ret = boco_set_bits(PRST1, BRIDGE_RST);
+       ret = boco_set_bits(PRST1, resets);
        if (ret)
                return ret;
 
@@ -209,4 +253,3 @@ int toggle_eeprom_spi_bus(void)
 
        return 0;
 }
-