DECLARE_GLOBAL_DATA_PTR;
-static int io_dev;
-extern I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf);
+/*
+ * BOCO FPGA definitions
+ */
+#define BOCO 0x10
+#define REG_CTRL_H 0x02
+#define MASK_WRL_UNITRUN 0x01
+#define MASK_RBX_PGY_PRESENT 0x40
+#define REG_IRQ_CIRQ2 0x2d
+#define MASK_RBI_DEFECT_16 0x01
/* Multi-Purpose Pins Functionality configuration */
u32 kwmpp_config[] = {
MPP41_GPIO, /* Piggy3 LED[4] */
MPP42_GPIO, /* Piggy3 LED[5] */
MPP43_GPIO, /* Piggy3 LED[6] */
- MPP44_GPIO, /* Piggy3 LED[7] */
+ MPP44_GPIO, /* Piggy3 LED[7], BIST_EN_L */
MPP45_GPIO, /* Piggy3 LED[8] */
MPP46_GPIO, /* Reserved */
MPP47_GPIO, /* Reserved */
0
};
+#if defined(CONFIG_MGCOGE3UN)
+/*
+ * Wait for startup OK from mgcoge3ne
+ */
+int startup_allowed(void)
+{
+ unsigned char buf;
+
+ /*
+ * Read CIRQ16 bit (bit 0)
+ */
+ if (i2c_read(BOCO, REG_IRQ_CIRQ2, 1, &buf, 1) != 0)
+ printf("%s: Error reading Boco\n", __func__);
+ else
+ if ((buf & MASK_RBI_DEFECT_16) == MASK_RBI_DEFECT_16)
+ return 1;
+ return 0;
+}
+
+/*
+ * mgcoge3un has always ethernet present. Its connected to the 6061 switch
+ * and provides ICNev and piggy4 connections.
+ */
+int ethernet_present(void)
+{
+ return 1;
+}
+#else
int ethernet_present(void)
{
uchar buf;
int ret = 0;
- if (i2c_read(0x10, 2, 1, &buf, 1) != 0) {
- printf ("%s: Error reading Boco\n", __FUNCTION__);
+ if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
+ printf("%s: Error reading Boco\n", __func__);
return -1;
}
- if ((buf & 0x40) == 0x40) {
+ if ((buf & MASK_RBX_PGY_PRESENT) == MASK_RBX_PGY_PRESENT)
ret = 1;
- }
+
return ret;
}
+#endif
+
+int initialize_unit_leds(void)
+{
+ /*
+ * Init the unit LEDs per default they all are
+ * ok apart from bootstat
+ */
+ uchar buf;
+
+ if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
+ printf("%s: Error reading Boco\n", __func__);
+ return -1;
+ }
+ buf |= MASK_WRL_UNITRUN;
+ if (i2c_write(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
+ printf("%s: Error writing Boco\n", __func__);
+ return -1;
+ }
+ return 0;
+}
+
+#if defined(CONFIG_BOOTCOUNT_LIMIT)
+void set_bootcount_addr(void)
+{
+ uchar buf[32];
+ unsigned int bootcountaddr;
+ bootcountaddr = gd->ram_size - BOOTCOUNT_ADDR;
+ sprintf((char *)buf, "0x%x", bootcountaddr);
+ setenv("bootcountaddr", (char *)buf);
+}
+#endif
int misc_init_r(void)
{
- I2C_MUX_DEVICE *i2cdev;
char *str;
int mach_type;
- /* add I2C Bus for I/O Expander */
- i2cdev = i2c_mux_ident_muxstring((uchar *)"pca9554a:70:a");
- io_dev = i2cdev->busid;
- puts("Piggy:");
- if (ethernet_present() == 0)
- puts (" not");
- puts(" present\n");
-
str = getenv("mach_type");
if (str != NULL) {
mach_type = simple_strtoul(str, NULL, 10);
printf("Overwriting MACH_TYPE with %d!!!\n", mach_type);
gd->bd->bi_arch_number = mach_type;
}
+#if defined(CONFIG_MGCOGE3UN)
+ char *wait_for_ne;
+ wait_for_ne = getenv("waitforne");
+ if (wait_for_ne != NULL) {
+ if (strcmp(wait_for_ne, "true") == 0) {
+ int cnt = 0;
+ puts("NE go: ");
+ while (startup_allowed() == 0) {
+ udelay(200000);
+ cnt++;
+ if (cnt == 5)
+ puts("wait\b\b\b\b");
+ if (cnt == 10) {
+ cnt = 0;
+ puts(" \b\b\b\b");
+ }
+ }
+ puts("OK\n");
+ }
+ }
+#endif
+
+ initialize_unit_leds();
+ set_km_env();
+#if defined(CONFIG_BOOTCOUNT_LIMIT)
+ set_bootcount_addr();
+#endif
return 0;
}
-int board_init(void)
+int board_early_init_f(void)
{
u32 tmp;
writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
tmp = readl(KW_GPIO0_BASE + 4);
writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE + 4);
- printf("KM: setting NAND mode\n");
+#if defined(CONFIG_SOFT_I2C)
+ /* init the GPIO for I2C Bitbang driver */
+ kw_gpio_set_valid(KM_KIRKWOOD_SDA_PIN, 1);
+ kw_gpio_set_valid(KM_KIRKWOOD_SCL_PIN, 1);
+ kw_gpio_direction_output(KM_KIRKWOOD_SDA_PIN, 0);
+ kw_gpio_direction_output(KM_KIRKWOOD_SCL_PIN, 0);
+#endif
+#if defined(CONFIG_SYS_EEPROM_WREN)
+ kw_gpio_set_valid(KM_KIRKWOOD_ENV_WP, 38);
+ kw_gpio_direction_output(KM_KIRKWOOD_ENV_WP, 1);
+#endif
+
+ return 0;
+}
+
+int board_init(void)
+{
/*
* arch number of board
*/
- gd->bd->bi_arch_number = MACH_TYPE_SUEN3;
+ gd->bd->bi_arch_number = MACH_TYPE_KM_KIRKWOOD;
/* address of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
-#if defined(CONFIG_SOFT_I2C)
- /* init the GPIO for I2C Bitbang driver */
- kw_gpio_set_valid(SUEN3_SDA_PIN, 1);
- kw_gpio_set_valid(SUEN3_SCL_PIN, 1);
- kw_gpio_direction_output(SUEN3_SDA_PIN, 0);
- kw_gpio_direction_output(SUEN3_SCL_PIN, 0);
-#endif
-#if defined(CONFIG_SYS_EEPROM_WREN)
- kw_gpio_set_valid(SUEN3_ENV_WP, 38);
- kw_gpio_direction_output(SUEN3_ENV_WP, 1);
-#endif
return 0;
}
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = kw_sdram_bar(i);
- gd->bd->bi_dram[i].size = kw_sdram_bs(i);
gd->bd->bi_dram[i].size = get_ram_size((long *)kw_sdram_bar(i),
kw_sdram_bs(i));
}
}
#if defined(CONFIG_HUSH_INIT_VAR)
-int hush_init_var (void)
+int hush_init_var(void)
{
- ivm_read_eeprom ();
+ ivm_read_eeprom();
return 0;
}
#endif
#if defined(CONFIG_BOOTCOUNT_LIMIT)
-void bootcount_store (ulong a)
+void bootcount_store(ulong a)
{
volatile ulong *save_addr;
volatile ulong size = 0;
writel(BOOTCOUNT_MAGIC, &save_addr[1]);
}
-ulong bootcount_load (void)
+ulong bootcount_load(void)
{
volatile ulong *save_addr;
volatile ulong size = 0;
#endif
#if defined(CONFIG_SOFT_I2C)
-void set_sda (int state)
+void set_sda(int state)
{
I2C_ACTIVE;
I2C_SDA(state);
}
-void set_scl (int state)
+void set_scl(int state)
{
I2C_SCL(state);
}
-int get_sda (void)
+int get_sda(void)
{
I2C_TRISTATE;
return I2C_READ;
}
-int get_scl (void)
+int get_scl(void)
{
- return (kw_gpio_get_value(SUEN3_SCL_PIN) ? 1 : 0);
+ return kw_gpio_get_value(KM_KIRKWOOD_SCL_PIN) ? 1 : 0;
}
#endif
#if defined(CONFIG_SYS_EEPROM_WREN)
-int eeprom_write_enable (unsigned dev_addr, int state)
+int eeprom_write_enable(unsigned dev_addr, int state)
{
- kw_gpio_set_value(SUEN3_ENV_WP, !state);
+ kw_gpio_set_value(KM_KIRKWOOD_ENV_WP, !state);
- return !kw_gpio_get_value(SUEN3_ENV_WP);
+ return !kw_gpio_get_value(KM_KIRKWOOD_ENV_WP);
}
#endif