Merge branch 'master' of git://git.denx.de/u-boot

[u-boot] / board / kmc / kzm9g / kzm9g.c

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index ad72c8daf3e57c754e6a6d9484262e868fca628b..0d895c2b421bfbac20c847f17afe5801570d592b 100644 (file)
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -31,9 +31,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define CS0BCR_D (0x06C00400)
-#define CS4BCR_D (0x06C00400)
+#define CS4BCR_D (0x16c90400)
 #define CS0WCR_D (0x55062C42)
-#define CS4WCR_D (0x19051443)
+#define CS4WCR_D (0x1e071dc3)
+
 #define CMNCR_BROMMD0   (1 << 21)
 #define CMNCR_BROMMD1   (1 << 22)
 #define CMNCR_BROMMD   (CMNCR_BROMMD0|CMNCR_BROMMD1)
@@ -42,6 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SMSTPCR1_CMT0  (1 << 24)
 #define SMSTPCR1_I2C0  (1 << 16)
 #define SMSTPCR3_USB   (1 << 22)
+#define SMSTPCR3_I2C1  (1 << 23)
 
 #define PORT32CR (0xE6051020)
 #define PORT33CR (0xE6051021)
@@ -82,7 +84,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc)
        writel(0x0017040a, &sbsc->sdwcr01);
        writel(0x31020707, &sbsc->sdwcr10);
        writel(0x0017040a, &sbsc->sdwcr11);
-       writel(0x05555555, &sbsc->sddrvcr0);
+       writel(0x055557ff, &sbsc->sddrvcr0); /* Enlarge drivability of LPDQS0-3, LPCLK */
        writel(0x30000000, &sbsc->sdwcr2);
 
        writel(readl(&sbsc->sdpcr) | 0x80, &sbsc->sdpcr);
@@ -110,7 +112,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc)
                writel(0x0, SDMRA1A);
                writel(0x00000402, &sbsc->sdmracr0);
                writel(0x0, SDMRA1A);
-               writel(0x00000403, &sbsc->sdmracr0);
+               writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */
                writel(0x0, SDMRA1A);
                writel(0x0, SDMRA2A);
        } else {
@@ -118,7 +120,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc)
                writel(0x0, SDMRA1B);
                writel(0x00000402, &sbsc->sdmracr0);
                writel(0x0, SDMRA1B);
-               writel(0x00000403, &sbsc->sdmracr0);
+               writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */
                writel(0x0, SDMRA1B);
                writel(0x0, SDMRA2B);
        }
@@ -163,6 +165,7 @@ void s_init(void)
        #define LIFEC_SEC_SRC_BIT       (1 << 15)
        writel(readl(LIFEC_SEC_SRC) & ~LIFEC_SEC_SRC_BIT, LIFEC_SEC_SRC);
 
+       clrbits_le32(&cpg->smstpcr3, (1 << 15));
        clrbits_le32(&cpg_srcr->srcr3, (1 << 15));
        clrbits_le32(&cpg->smstpcr2, (1 << 18));
        clrbits_le32(&cpg_srcr->srcr2, (1 << 18));
@@ -192,7 +195,7 @@ void s_init(void)
 
        /* FRQCR Init */
        writel(0x0012453C, &cpg->frqcra);
-       writel(0x80331350, &cpg->frqcrb);
+       writel(0x80431350, &cpg->frqcrb);    /* ETM TRCLK  78MHz */
        cmp_loop(&cpg->frqcrb, 0x80000000, 0x0);
        writel(0x00000B0B, &cpg->frqcrd);
        cmp_loop(&cpg->frqcrd, 0x80000000, 0x0);
@@ -266,6 +269,7 @@ void s_init(void)
 
        writel(0x00000b0b, &cpg->frqcrd);
        cmp_loop(&cpg->frqcrd, 0x80000000, 0x0);
+       writel(0xfffffffc, &cpg->cpgxxcs4);
 }
 
 int board_early_init_f(void)
@@ -284,8 +288,8 @@ int board_early_init_f(void)
 
        clrbits_le32(&cpg->smstpcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
        clrbits_le32(&cpg_srcr->srcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
-       clrbits_le32(&cpg->smstpcr3, SMSTPCR3_USB);
-       clrbits_le32(&cpg_srcr->srcr3, SMSTPCR3_USB);
+       clrbits_le32(&cpg->smstpcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
+       clrbits_le32(&cpg_srcr->srcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
        writel(VCLKCR1_D, &cpg->vclkcr1);
 
        /* Setup SCIF4 / workaround */
@@ -297,8 +301,19 @@ int board_early_init_f(void)
        return 0;
 }
 
+void adjust_core_voltage(void)
+{
+       u8 data;
+
+       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       data = 0x35;
+       i2c_set_bus_num(0);
+       i2c_write(0x40, 3, 1, &data, 1);
+}
+
 int board_init(void)
 {
+       adjust_core_voltage();
        sh73a0_pinmux_init();
 
     /* SCIFA 4 */
@@ -340,6 +355,8 @@ int board_init(void)
        gpio_direction_output(GPIO_PORT15, 1);
 
        /* I2C */
+       gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL);
+       gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL);
        gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL);
        gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL);
 
@@ -369,4 +386,6 @@ int board_eth_init(bd_t *bis)
 
 void reset_cpu(ulong addr)
 {
+       /* Soft Power On Reset */
+       writel((1 << 31), RESCNT2);
 }